[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add FAKE SMI trigger definitions
frank vibrans (Code Review)
gerrit at coreboot.org
Thu Oct 12 18:36:41 CEST 2017
frank vibrans has uploaded this change for review. ( https://review.coreboot.org/21992
Change subject: soc/amd/stoneyridge: Add FAKE SMI trigger definitions
......................................................................
soc/amd/stoneyridge: Add FAKE SMI trigger definitions
Add FAKE SMI trigger definitions to SMI trigger 0 defines.
SMITRG0_FAKE0 is used by the PSP to initiate communications with
the BIOS.
Change-Id: I195765890817f26adf4d41be61ca0164144e15f7
Signed-off-by: Frank Vibrans <frank.vibrans at scarletltd.com>
---
M src/soc/amd/stoneyridge/include/soc/smi.h
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/21992/1
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h
index 797f4e8..236f356 100644
--- a/src/soc/amd/stoneyridge/include/soc/smi.h
+++ b/src/soc/amd/stoneyridge/include/soc/smi.h
@@ -167,6 +167,9 @@
#define SMI_TIMER_EN (1 << 15)
#define SMI_REG_SMITRIG0 0x98
+# define SMITRG0_FAKE0 (1 << 25)
+# define SMITRG0_FAKE1 (1 << 26)
+# define SMITRG0_FAKE2 (1 << 27)
# define SMITRG0_EOS (1 << 28)
# define SMI_TIMER_SEL (1 << 29)
# define SMITRG0_SMIENB (1 << 31)
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I195765890817f26adf4d41be61ca0164144e15f7
Gerrit-Change-Number: 21992
Gerrit-PatchSet: 1
Gerrit-Owner: frank vibrans <frank.vibrans at scarletltd.com>
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