[coreboot-gerrit] Change in coreboot[master]: google/cyan variants: fix non-functional typo in gpio.c
Matt DeVillier (Code Review)
gerrit at coreboot.org
Sun Oct 8 00:05:31 CEST 2017
Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/21918
Change subject: google/cyan variants: fix non-functional typo in gpio.c
......................................................................
google/cyan variants: fix non-functional typo in gpio.c
Typo found/fixed in to-be-merged boards; applying same fix to
already-merged boards.
Change-Id: I15f97467a5442888165399be997b0b690a3c312a
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/mainboard/google/cyan/variants/banon/gpio.c
M src/mainboard/google/cyan/variants/celes/gpio.c
M src/mainboard/google/cyan/variants/cyan/gpio.c
M src/mainboard/google/cyan/variants/edgar/gpio.c
M src/mainboard/google/cyan/variants/reks/gpio.c
M src/mainboard/google/cyan/variants/terra/gpio.c
6 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/21918/1
diff --git a/src/mainboard/google/cyan/variants/banon/gpio.c b/src/mainboard/google/cyan/variants/banon/gpio.c
index 62da10c..e077bcc 100644
--- a/src/mainboard/google/cyan/variants/banon/gpio.c
+++ b/src/mainboard/google/cyan/variants/banon/gpio.c
@@ -72,7 +72,7 @@
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
GPIO_NC, /* 85 SDMMC3_1P8_EN */
diff --git a/src/mainboard/google/cyan/variants/celes/gpio.c b/src/mainboard/google/cyan/variants/celes/gpio.c
index 9f6ae87..ebb7717 100644
--- a/src/mainboard/google/cyan/variants/celes/gpio.c
+++ b/src/mainboard/google/cyan/variants/celes/gpio.c
@@ -74,7 +74,7 @@
GPI(trig_edge_both, L1, P_20K_H, non_maskable,
en_edge_detect, NA , NA),
/* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
Native_M1, /* 85 SDMMC3_1P8_EN */
diff --git a/src/mainboard/google/cyan/variants/cyan/gpio.c b/src/mainboard/google/cyan/variants/cyan/gpio.c
index 9e8c5d1..340a8af 100644
--- a/src/mainboard/google/cyan/variants/cyan/gpio.c
+++ b/src/mainboard/google/cyan/variants/cyan/gpio.c
@@ -72,7 +72,7 @@
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
NATIVE_INT(1, L1), /* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
Native_M1, /* 85 SDMMC3_1P8_EN */
diff --git a/src/mainboard/google/cyan/variants/edgar/gpio.c b/src/mainboard/google/cyan/variants/edgar/gpio.c
index 6e81c23..779b336 100644
--- a/src/mainboard/google/cyan/variants/edgar/gpio.c
+++ b/src/mainboard/google/cyan/variants/edgar/gpio.c
@@ -72,7 +72,7 @@
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
GPIO_NC, /* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
Native_M1, /* 85 SDMMC3_1P8_EN */
diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c
index e7b2adf..eac413b 100644
--- a/src/mainboard/google/cyan/variants/reks/gpio.c
+++ b/src/mainboard/google/cyan/variants/reks/gpio.c
@@ -72,7 +72,7 @@
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
Native_M1, /* 85 SDMMC3_1P8_EN */
diff --git a/src/mainboard/google/cyan/variants/terra/gpio.c b/src/mainboard/google/cyan/variants/terra/gpio.c
index 200ef2b..8c87916 100644
--- a/src/mainboard/google/cyan/variants/terra/gpio.c
+++ b/src/mainboard/google/cyan/variants/terra/gpio.c
@@ -72,7 +72,7 @@
GPIO_NC, /* 79 GPI ILB_SERIRQ */
Native_M1, /* 80 USB_OC0_B */
NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */
- GPIO_NC, /* 82 spkr asummed gpio number */
+ GPIO_NC, /* 82 spkr assumed gpio number */
Native_M1, /* 83 SUSPWRDNACK */
SPARE_PIN,/* 84 spare pin */
Native_M1, /* 85 SDMMC3_1P8_EN */
--
To view, visit https://review.coreboot.org/21918
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I15f97467a5442888165399be997b0b690a3c312a
Gerrit-Change-Number: 21918
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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