[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Update PCIE CLKREQ programing

[Lijian Zhao (Code Review)]

Hello Pratikkumar V Prajapati, Subrata Banik, Ravishankar Sarawadi, Bora Guvendik, build bot (Jenkins), Hannah Williams, Shaunak Saha, Krzysztof M Sywula, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/21878

to look at the new patch set (#4).

Change subject: soc/intel/cannonlake: Update PCIE CLKREQ programing
......................................................................

soc/intel/cannonlake: Update PCIE CLKREQ programing

UPD of PCI express clock request had been updated in FSP 7.0.14.11,
change that in coreboot accordingly.

TEST=NONE

Change-Id: I2261deccfb489c0de577d580997744a484f07a04
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/include/soc/pch.h
M src/soc/intel/cannonlake/include/soc/pci_devs.h
M src/soc/intel/cannonlake/romstage/romstage.c
5 files changed, 27 insertions(+), 11 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/21878/4
-- 
To view, visit https://review.coreboot.org/21878
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I2261deccfb489c0de577d580997744a484f07a04
Gerrit-Change-Number: 21878
Gerrit-PatchSet: 4
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula at intel.com>
Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi at intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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