[coreboot-gerrit] Change in coreboot[master]: soraka:[DEBUGONLY] disable AER

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/21869


Change subject: soraka:[DEBUGONLY] disable AER
......................................................................

soraka:[DEBUGONLY] disable AER

Change-Id: I6861f57f58e54721ce8cd5ff3fabf8be231d8350
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/21869/1

diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index f6948d9..902b202 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -153,7 +153,7 @@
 	# RP 1 uses SRCCLKREQ1#
 	register "PcieRpClkReqNumber[0]" = "1"
 	# RP 1, Enable Advanced Error Reporting
-	register "PcieRpAdvancedErrorReporting[0]" = "1"
+	register "PcieRpAdvancedErrorReporting[0]" = "0"
 	# RP 1, Enable Latency Tolerance Reporting Mechanism
 	register "PcieRpLtrEnable[0]" = "1"
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6861f57f58e54721ce8cd5ff3fabf8be231d8350
Gerrit-Change-Number: 21869
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi at intel.com>
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