[coreboot-gerrit] Change in coreboot[master]: util/intelmetool: Fix lint errors and warnings

Patrick Rudolph (Code Review) gerrit at coreboot.org
Sun Nov 19 11:11:13 CET 2017


Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/22521


Change subject: util/intelmetool: Fix lint errors and warnings
......................................................................

util/intelmetool: Fix lint errors and warnings

Clean the code to fix all errors and warnings.
No functional change.

Changes:
* Fix lines over 80chars
* Fix typos
* Restructure code to reduce ident level
* Move RCBA handling into own files
* Introduce helper functions for RCBA access
* Move GPL string into header
* Fix whitespace in macros

Change-Id: Ib8e3617ebb34c47959d6619dfbc7189045e6b8f7
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M util/intelmetool/Makefile
M util/intelmetool/intelmetool.c
M util/intelmetool/intelmetool.h
A util/intelmetool/rcba.c
A util/intelmetool/rcba.h
5 files changed, 331 insertions(+), 217 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/22521/1

diff --git a/util/intelmetool/Makefile b/util/intelmetool/Makefile
index 8857d95..5862dca 100644
--- a/util/intelmetool/Makefile
+++ b/util/intelmetool/Makefile
@@ -20,7 +20,7 @@
 CFLAGS  ?= -O0 -g -Wall -W -Wno-unused-parameter -Wno-sign-compare -Wno-unused-function
 LDFLAGS += -lpci -lz
 
-OBJS = intelmetool.o me.o me_status.o mmap.o
+OBJS = intelmetool.o me.o me_status.o mmap.o rcba.o
 
 OS_ARCH	= $(shell uname)
 ifeq ($(OS_ARCH), Darwin)
diff --git a/util/intelmetool/intelmetool.c b/util/intelmetool/intelmetool.c
index 2acfec2..6f3d0b3 100644
--- a/util/intelmetool/intelmetool.c
+++ b/util/intelmetool/intelmetool.c
@@ -24,6 +24,7 @@
 #include "me.h"
 #include "mmap.h"
 #include "intelmetool.h"
+#include "rcba.h"
 
 #define FD2 0x3428
 #define ME_COMMAND_DELAY 10000
@@ -32,8 +33,6 @@
 int debug = 0;
 
 static uint32_t fd2 = 0;
-static const int size = 0x4000;
-static volatile uint8_t *rcba;
 
 static void dumpmem(uint8_t *phys, uint32_t size)
 {
@@ -61,16 +60,6 @@
 		fprintf(fp, "%c", *((uint8_t *) (phys + i)));
 	}
 	fclose(fp);
-}
-
-static void rehide_me(void)
-{
-	if (fd2 & 0x2) {
-		printf("Re-hiding MEI device...");
-		fd2 = *(uint32_t *)(rcba + FD2);
-		*(uint32_t *)(rcba + FD2) = fd2 | 0x2;
-		printf("done\n");
-	}
 }
 
 /* You need >4GB total ram, in kernel cmdline, use 'mem=1000m'
@@ -103,7 +92,9 @@
 		printf("done\n\nHere are the first bytes:\n");
 		dumpmemfile(dump, 0x2000000);
 		//printf("Try reading 0x%zx with other mmap tool...\n"
-		//	"Press enter to quit, you only get one chance to run this tool before reboot required for some reason\n", me_clone);
+		//       "Press enter to quit, you only get one chance to run"
+		//       "this tool before reboot required for some reason\n",
+		//       me_clone);
 		while (getc(stdin) != '\n') {};
 		unmap_physical(dump, 0x2000000);
 	}
@@ -123,27 +114,35 @@
 	pci_scan_bus(pacc);
 
 	for (dev=pacc->devices; dev; dev=dev->next) {
-		pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
+		pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES |
+				   PCI_FILL_SIZES | PCI_FILL_CLASS);
 		name = pci_lookup_name(pacc, namebuf, sizeof(namebuf),
 			PCI_LOOKUP_DEVICE, dev->vendor_id, dev->device_id);
 		if (name == NULL)
 			name = "<unknown>";
-		if (dev->vendor_id == PCI_VENDOR_ID_INTEL) {
-			if (PCI_DEV_HAS_ME_DISABLE(dev->device_id)) {
-				printf(CGRN "Good news, you have a `%s` so ME is present but can be disabled, continuing...\n\n" RESET, name);
-				break;
-			} else if (PCI_DEV_HAS_ME_DIFFICULT(dev->device_id)) {
-				printf(CRED "Bad news, you have a `%s` so you have ME hardware on board and you can't control or disable it, continuing...\n\n" RESET, name);
-				break;
-			} else if (PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id)) {
-				printf(CYEL "Not sure if ME hardware is present because you have a `%s`, but it is possible to disable it if you do, continuing...\n\n" RESET, name);
-				break;
-			} else if (PCI_DEV_ME_NOT_SURE(dev->device_id)) {
-				printf(CYEL "Found `%s`. Not sure whether you have ME hardware, exiting\n\n" RESET, name);
-				pci_cleanup(pacc);
-				return 1;
-				break;
-			}
+		if (dev->vendor_id != PCI_VENDOR_ID_INTEL)
+			continue;
+
+		if (PCI_DEV_HAS_ME_DISABLE(dev->device_id)) {
+			printf(CGRN "Good news, you have a `%s` so ME is "
+			       "present but can be disabled, continuing...\n\n"
+			       RESET, name);
+			break;
+		} else if (PCI_DEV_HAS_ME_DIFFICULT(dev->device_id)) {
+			printf(CRED "Bad news, you have a `%s` so you have ME"
+			       "hardware on board and you can't control or "
+			       "disable it, continuing...\n\n" RESET, name);
+			break;
+		} else if (PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id)) {
+			printf(CYEL "Not sure if ME hardware is present because"
+			       "you have a `%s`, but it is possible to disable"
+			       "it if you do, continuing...\n\n" RESET, name);
+			break;
+		} else if (PCI_DEV_ME_NOT_SURE(dev->device_id)) {
+			printf(CYEL "Found `%s`. Not sure whether you have ME"
+			       "hardware, exiting\n\n" RESET, name);
+			pci_cleanup(pacc);
+			return 1;
 		}
 	}
 
@@ -152,7 +151,8 @@
 	    !PCI_DEV_HAS_ME_DIFFICULT(dev->device_id) &&
 	    !PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(dev->device_id) &&
 	    !PCI_DEV_ME_NOT_SURE(dev->device_id)) {
-		printf(CCYN "ME is not present on your board or unkown\n\n" RESET);
+		printf(CCYN "ME is not present on your board or unknown\n\n"
+		       RESET);
 		pci_cleanup(pacc);
 		return 1;
 	}
@@ -160,6 +160,43 @@
 	pci_cleanup(pacc);
 
 	return 0;
+}
+
+static int activate_me(void)
+{
+	if (read_rcba32(FD2, &fd2)) {
+		printf("Error reading RCBA\n");
+		return 1;
+	}
+	if (write_rcba32(FD2, fd2 & ~0x2)) {
+		printf("Error writing RCBA\n");
+		return 1;
+	}
+	if (debug) {
+		if (fd2 & 0x2)
+			printf("MEI was hidden on PCI, now unlocked\n");
+		else
+			printf("MEI not hidden on PCI, checking if visible\n");
+	}
+	return 0;
+}
+
+static void rehide_me(void)
+{
+	if (fd2 & 0x2) {
+		if (debug)
+			printf("Re-hiding MEI device...");
+		if (read_rcba32(FD2, &fd2)) {
+			printf("Error reading RCBA\n");
+			return;
+		}
+		if (write_rcba32(FD2, fd2 | 0x2)) {
+			printf("Error writing RCBA\n");
+			return;
+		}
+		if (debug)
+			printf("done\n");
+	}
 }
 
 static struct pci_dev *pci_me_interface_scan(const char **name, char *namebuf,
@@ -176,14 +213,16 @@
 	pci_scan_bus(pacc);
 
 	for (dev=pacc->devices; dev; dev=dev->next) {
-		pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
+		pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES |
+				   PCI_FILL_SIZES | PCI_FILL_CLASS);
 		*name = pci_lookup_name(pacc, namebuf, namebuf_size,
 			PCI_LOOKUP_DEVICE, dev->vendor_id, dev->device_id);
-		if (dev->vendor_id == PCI_VENDOR_ID_INTEL) {
-			if (PCI_DEV_HAS_SUPPORTED_ME(dev->device_id)) {
-				me = 1;
-				break;
-			}
+		if (dev->vendor_id != PCI_VENDOR_ID_INTEL)
+			continue;
+
+		if (PCI_DEV_HAS_SUPPORTED_ME(dev->device_id)) {
+			me = 1;
+			break;
 		}
 	}
 
@@ -198,74 +237,28 @@
 	return dev;
 }
 
-static int activate_me(void)
-{
-	struct pci_access *pacc;
-	struct pci_dev *sb;
-	uint32_t rcba_phys;
-
-	pacc = pci_alloc();
-	pacc->method = PCI_ACCESS_I386_TYPE1;
-
-	pci_init(pacc);
-	pci_scan_bus(pacc);
-
-	sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
-	if (!sb) {
-		printf("Uh oh, southbridge not on BDF(0:31:0), please report this error, exiting.\n");
-		pci_cleanup(pacc);
-		return 1;
-	}
-	pci_fill_info(sb, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_CLASS);
-
-	rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
-	rcba = map_physical((off_t)rcba_phys, size);
-	if (rcba == NULL) {
-		printf("Could not map MEI PCI device memory\n");
-		pci_free_dev(sb);
-		pci_cleanup(pacc);
-		return 1;
-	}
-
-	//printf("RCBA at 0x%08" PRIx32 "\n", (uint32_t)rcba_phys);
-	fd2 = *(uint32_t *)(rcba + FD2);
-	*(uint32_t *)(rcba + FD2) = fd2 & ~0x2;
-	if (fd2 & 0x2) {
-		printf("MEI was hidden on PCI, now unlocked\n");
-	} else {
-		printf("MEI not hidden on PCI, checking if visible\n");
-	}
-
-	pci_free_dev(sb);
-	pci_cleanup(pacc);
-
-	return 0;
-}
-
 static void dump_me_info(void)
 {
 	struct pci_dev *dev;
 	uint32_t stat, stat2;
 	char namebuf[1024];
-	const char *name;
+	const char *name = NULL;
 
-	if (pci_platform_scan()) {
+	if (pci_platform_scan())
 		exit(1);
-	}
 
-	if (activate_me()) {
+	if (activate_me())
 		exit(1);
-	}
 
 	dev = pci_me_interface_scan(&name, namebuf, sizeof(namebuf));
-	if (!dev) {
+	if (!dev)
 		exit(1);
-	}
 
 	if (name == NULL)
 		name = "<unknown>";
 
-	printf("MEI found: [%x:%x] %s\n\n", dev->vendor_id, dev->device_id, name);
+	printf("MEI found: [%x:%x] %s\n\n",
+	       dev->vendor_id, dev->device_id, name);
 	stat = pci_read_long(dev, 0x40);
 	printf("ME Status   : 0x%x\n", stat);
 	stat2 = pci_read_long(dev, 0x48);
@@ -276,9 +269,9 @@
 	intel_me_extend_valid(dev);
 	printf("\n");
 
-	if (stat & 0xf000) {
-		printf("ME: has a broken implementation on your board with this BIOS\n");
-	}
+	if (stat & 0xf000)
+		printf("ME: has a broken implementation on your board with"
+		       "this firmware\n");
 
 	intel_mei_setup(dev);
 	usleep(ME_COMMAND_DELAY);
@@ -292,33 +285,24 @@
 	usleep(ME_COMMAND_DELAY);
 
 	rehide_me();
-
-	munmap((void*)rcba, size);
 }
 
 static void print_version(void)
 {
 	printf("intelmetool v%s -- ", INTELMETOOL_VERSION);
 	printf("Copyright (C) 2015 Damien Zammit\n\n");
-	printf(
-		"This program is free software: you can redistribute it and/or modify\n"
-		"it under the terms of the GNU General Public License as published by\n"
-		"the Free Software Foundation, version 2 of the License.\n\n"
-		"This program is distributed in the hope that it will be useful,\n"
-		"but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
-		"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
-		"GNU General Public License for more details.\n\n");
+	printf(GPLV2COPYRIGHT);
 }
 
 static void print_usage(const char *name)
 {
 	printf("usage: %s [-vh?sd]\n", name);
 	printf("\n"
-			 "   -v | --version:                   print the version\n"
-			 "   -h | --help:                      print this help\n\n"
-			 "   -s | --show:                      dump all me information on console\n"
-			 "   -d | --debug:                     enable debug output\n"
-			 "\n");
+	       "   -v | --version:         print the version\n"
+	       "   -h | --help:            print this help\n\n"
+	       "   -s | --show:            dump all me information on console\n"
+	       "   -d | --debug:           enable debug output\n"
+	       "\n");
 	exit(1);
 }
 
@@ -377,7 +361,8 @@
 		}
 
 	#ifndef __DARWIN__
-		if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
+		fd_mem = open("/dev/mem", O_RDWR);
+		if (fd_mem < 0) {
 			perror("Can not open /dev/mem");
 			exit(1);
 		}
diff --git a/util/intelmetool/intelmetool.h b/util/intelmetool/intelmetool.h
index b5fe35a..874df16 100644
--- a/util/intelmetool/intelmetool.h
+++ b/util/intelmetool/intelmetool.h
@@ -24,6 +24,15 @@
 
 #define INTELMETOOL_VERSION "1.0"
 
+#define GPLV2COPYRIGHT \
+"This program is free software: you can redistribute it and/or modify\n" \
+"it under the terms of the GNU General Public License as published by\n" \
+"the Free Software Foundation, version 2 of the License.\n\n" \
+"This program is distributed in the hope that it will be useful,\n" \
+"but WITHOUT ANY WARRANTY; without even the implied warranty of\n" \
+"MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n" \
+"GNU General Public License for more details.\n\n"
+
 #if defined(__GLIBC__)
 #include <sys/io.h>
 #endif
@@ -58,9 +67,9 @@
 #define PCI_DEVICE_ID_INTEL_ICH9M		0x2919
 
 #define PCI_DEV_HAS_ME_DISABLE(x) ( \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH8ME ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9ME ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9M  ))
+	((x) == PCI_DEVICE_ID_INTEL_ICH8ME) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9ME) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9M  ))
 
 // Definitely has ME and is very difficult to remove
 #define PCI_DEVICE_ID_INTEL_ICH10R		0x3a16
@@ -120,61 +129,61 @@
 #define PCI_DEVICE_ID_INTEL_X99			0x8d47
 
 #define PCI_DEV_HAS_ME_DIFFICULT(x) ( \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH10R ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3400_MOBILE ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_P55	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_PM55	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_H55	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QM57	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_H57	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM55	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Q57	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM57	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_B55_A	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QS57	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3400	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3420	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_3450	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_B55_B	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Z68	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_P67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_UM67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM65	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_H67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Q65	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QS67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Q67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QM67	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_B65	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_C202	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_C204	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_C206	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_H61	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Z77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Z75	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Q77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_Q75	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_B75	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_H77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_C216	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QM77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QS77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_UM77	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM76	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM75	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_HM70	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_NM70	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_QM87	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_DH89XXCC	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_X99	))
+	((x) == PCI_DEVICE_ID_INTEL_ICH10R) || \
+	((x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP) || \
+	((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE) || \
+	((x) == PCI_DEVICE_ID_INTEL_P55	) || \
+	((x) == PCI_DEVICE_ID_INTEL_PM55	) || \
+	((x) == PCI_DEVICE_ID_INTEL_H55	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QM57	) || \
+	((x) == PCI_DEVICE_ID_INTEL_H57	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM55	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Q57	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM57	) || \
+	((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF) || \
+	((x) == PCI_DEVICE_ID_INTEL_B55_A	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QS57	) || \
+	((x) == PCI_DEVICE_ID_INTEL_3400	) || \
+	((x) == PCI_DEVICE_ID_INTEL_3420	) || \
+	((x) == PCI_DEVICE_ID_INTEL_3450	) || \
+	((x) == PCI_DEVICE_ID_INTEL_B55_B	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Z68	) || \
+	((x) == PCI_DEVICE_ID_INTEL_P67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_UM67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM65	) || \
+	((x) == PCI_DEVICE_ID_INTEL_H67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Q65	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QS67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Q67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QM67	) || \
+	((x) == PCI_DEVICE_ID_INTEL_B65	) || \
+	((x) == PCI_DEVICE_ID_INTEL_C202	) || \
+	((x) == PCI_DEVICE_ID_INTEL_C204	) || \
+	((x) == PCI_DEVICE_ID_INTEL_C206	) || \
+	((x) == PCI_DEVICE_ID_INTEL_H61	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Z77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Z75	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Q77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_Q75	) || \
+	((x) == PCI_DEVICE_ID_INTEL_B75	) || \
+	((x) == PCI_DEVICE_ID_INTEL_H77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_C216	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QM77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QS77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_UM77	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM76	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM75	) || \
+	((x) == PCI_DEVICE_ID_INTEL_HM70	) || \
+	((x) == PCI_DEVICE_ID_INTEL_NM70	) || \
+	((x) == PCI_DEVICE_ID_INTEL_QM87	) || \
+	((x) == PCI_DEVICE_ID_INTEL_DH89XXCC	) || \
+	((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL	) || \
+	((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM	) || \
+	((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE	) || \
+	((x) == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP	) || \
+	((x) == PCI_DEVICE_ID_INTEL_X99	))
 
 // Not sure if ME present, but should be able to disable it easily
 #define PCI_DEVICE_ID_INTEL_ICH8		0x2810
@@ -185,20 +194,20 @@
 #define PCI_DEVICE_ID_INTEL_ICH9		0x2918
 
 #define PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(x) ( \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH8	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH8M	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9DH	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9DO	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9R	) || \
-	( (x) == PCI_DEVICE_ID_INTEL_ICH9	))
+	((x) == PCI_DEVICE_ID_INTEL_ICH8	) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH8M	) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9DH	) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9DO	) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9R	) || \
+	((x) == PCI_DEVICE_ID_INTEL_ICH9	))
 
 // Not sure at all
 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC	0x8119
 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO		0x8100
 
 #define PCI_DEV_ME_NOT_SURE(x) ( \
-	( (x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC ) || \
-	( (x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO))
+	((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC) || \
+	((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO))
 
 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_1	0x1C3A /* Cougar Point */
 #define PCI_DEVICE_ID_INTEL_PATSBURG_1	0x1D3A /* C600/X79 Patsburg */
@@ -244,45 +253,45 @@
 #define PCI_DEVICE_ID_INTEL_SUNRISE_LP 0x9d3a /* SUNRISE Point-LP */
 
 #define PCI_DEV_HAS_SUPPORTED_ME(x) ( \
-	( (x) ==  PCI_DEVICE_ID_INTEL_COUGARPOINT_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_PATSBURG_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_3 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CAVECREEK ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_3 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_4 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_5 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82946GZ ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82G35 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82Q963 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82P965 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82Q35 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82G33 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82Q33 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_82X38 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_3200 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_PM965 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_GME965 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_3 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_4 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_5 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_3 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_4 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CALPELLA_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_CALPELLA_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_3 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_4 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_WILDCAT_1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_WILDCAT_2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_H1 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_H2 ) || \
-	( (x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_LP))
+	((x) ==  PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_PATSBURG_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_PANTHERPOINT_3) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CAVECREEK) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_3) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_4) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_BEARLAKE_5) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82946GZ) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82G35) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82Q963) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82P965) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82Q35) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82G33) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82Q33) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_82X38) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_3200) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_PM965) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_GME965) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_3) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_4) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CANTIGA_5) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_3) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_EAGLELAKE_4) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CALPELLA_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_CALPELLA_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_3) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_LYNXPOINT_4) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_WILDCAT_1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_WILDCAT_2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_H1) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_H2) || \
+	((x) ==  PCI_DEVICE_ID_INTEL_SUNRISE_LP))
diff --git a/util/intelmetool/rcba.c b/util/intelmetool/rcba.c
new file mode 100644
index 0000000..fcc9bc5
--- /dev/null
+++ b/util/intelmetool/rcba.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2014  Damien Zammit <damien at zamaudio.com>
+ * Copyright (C) 2017  Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "intelmetool.h"
+#include "mmap.h"
+#include "rcba.h"
+
+static const int size = 0x4000;
+
+/* Returns the physical RCBA base address or zero on error. */
+static u32 get_rcba_phys(void)
+{
+	struct pci_access *pacc;
+	struct pci_dev *sb;
+	uint32_t rcba_phys;
+
+	pacc = pci_alloc();
+	pacc->method = PCI_ACCESS_I386_TYPE1;
+
+	pci_init(pacc);
+	pci_scan_bus(pacc);
+
+	sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
+	if (!sb) {
+		printf("Uh oh, southbridge not on BDF(0:31:0), please report "
+		       "this error, exiting.\n");
+		pci_cleanup(pacc);
+		return 0;
+	}
+	pci_fill_info(sb, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_SIZES |
+			  PCI_FILL_CLASS);
+
+	rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
+
+	pci_free_dev(sb);
+	pci_cleanup(pacc);
+
+	return rcba_phys;
+}
+
+/*
+ * Writes 'val' to RCBA register at address 'addr'.
+ * Returns 1 on error and 0 on success.
+ */
+int write_rcba32(uint32_t addr, uint32_t val)
+{
+	volatile uint8_t *rcba;
+	const uint32_t rcba_phys = get_rcba_phys();
+
+	if (!rcba_phys) {
+		printf("Could not get RCBA address\n");
+		return 1;
+	}
+
+	rcba = map_physical((off_t)rcba_phys, size);
+	if (rcba == NULL) {
+		printf("Could not map RCBA\n");
+		return 1;
+	}
+	*(uint32_t *)(rcba + addr) = val;
+
+	munmap((void *)rcba, size);
+	return 0;
+}
+
+/*
+ * Reads RCBA register at address 'addr' and stores it in 'val'.
+ * Returns 1 on error and 0 on success.
+ */
+int read_rcba32(uint32_t addr, uint32_t *val)
+{
+	volatile uint8_t *rcba;
+	const uint32_t rcba_phys = get_rcba_phys();
+
+	if (!rcba_phys) {
+		printf("Could not get RCBA address\n");
+		return 1;
+	}
+
+	rcba = map_physical((off_t)rcba_phys, size);
+	if (rcba == NULL) {
+		printf("Could not map RCBA\n");
+		return 1;
+	}
+
+	*val = *(uint32_t *)(rcba + addr);
+
+	munmap((void *)rcba, size);
+	return 0;
+}
diff --git a/util/intelmetool/rcba.h b/util/intelmetool/rcba.h
new file mode 100644
index 0000000..a2c5817
--- /dev/null
+++ b/util/intelmetool/rcba.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2017  Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+int write_rcba32(uint32_t addr, uint32_t val);
+int read_rcba32(uint32_t addr, uint32_t *val);
+

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib8e3617ebb34c47959d6619dfbc7189045e6b8f7
Gerrit-Change-Number: 22521
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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