[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add mainboard call for SPD values

Marc Jones (Code Review) gerrit at coreboot.org
Fri Nov 17 02:58:19 CET 2017


Marc Jones has uploaded this change for review. ( https://review.coreboot.org/22485


Change subject: soc/amd/stoneyridge: Add mainboard call for SPD values
......................................................................

soc/amd/stoneyridge: Add mainboard call for SPD values

Add a mainboad function call to write the AGESA SPD buffer.

BUG=b:67845441

Change-Id: Id42622008b49b4559e648a7fa1bfd9f26e1f56a4
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/dimm_spd.h
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/dimm_spd.c
3 files changed, 21 insertions(+), 14 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/22485/1

diff --git a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
index 8683caa..00b4a06 100644
--- a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
+++ b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
@@ -20,6 +20,7 @@
 AmdMemoryReadSPD(IN UINT32 Func, IN UINTN Data,
 				IN OUT AGESA_READ_SPD_PARAMS *SpdData);
 
+int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len);
 int sb_read_spd(uint8_t spdAddress, char *buf, size_t len);
 
 #endif
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index 2c68f38..63ae4cf 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -96,19 +96,7 @@
 	if (!ENV_ROMSTAGE)
 		return Status;
 
-	if (IS_ENABLED(CONFIG_GENERIC_SPD_BIN)) {
-		AGESA_READ_SPD_PARAMS *info = ConfigPtr;
-		if (info->MemChannelId > 0)
-			return AGESA_UNSUPPORTED;
-		if (info->SocketId != 0)
-			return AGESA_UNSUPPORTED;
-		if (info->DimmId > 1)
-			return AGESA_UNSUPPORTED;
-
-		die("SPD in cbfs not yet supported.\n");
-	} else {
-		Status = AmdMemoryReadSPD(Func, Data, ConfigPtr);
-	}
+	Status = AmdMemoryReadSPD(Func, Data, ConfigPtr);
 
 	return Status;
 }
diff --git a/src/soc/amd/stoneyridge/dimm_spd.c b/src/soc/amd/stoneyridge/dimm_spd.c
index ee58e9b..263c28a 100644
--- a/src/soc/amd/stoneyridge/dimm_spd.c
+++ b/src/soc/amd/stoneyridge/dimm_spd.c
@@ -25,23 +25,41 @@
 						AGESA_READ_SPD_PARAMS *info)
 {
 	uint8_t spd_address;
+	int err;
 	DEVTREE_CONST struct device *dev = dev_find_slot(0, DCT_DEVFN);
 	DEVTREE_CONST struct soc_amd_stoneyridge_config *conf = dev->chip_info;
 
 	if ((dev == 0) || (conf == 0))
 		return AGESA_ERROR;
+
 	if (info->SocketId >= ARRAY_SIZE(conf->spd_addr_lookup))
 		return AGESA_ERROR;
 	if (info->MemChannelId >= ARRAY_SIZE(conf->spd_addr_lookup[0]))
 		return AGESA_ERROR;
 	if (info->DimmId >= ARRAY_SIZE(conf->spd_addr_lookup[0][0]))
 		return AGESA_ERROR;
+
 	spd_address = conf->spd_addr_lookup
 		[info->SocketId][info->MemChannelId][info->DimmId];
 	if (spd_address == 0)
 		return AGESA_ERROR;
-	int err = sb_read_spd(spd_address, (void *)info->Buffer, CONFIG_DIMM_SPD_SIZE);
+
+	err = mainboard_read_spd(spd_address, (void *)info->Buffer, CONFIG_DIMM_SPD_SIZE);
+
+	/* Read the SPD if the mainboard didn't fill the buffer */
+	if (err || (*info->Buffer == 0))
+		err = sb_read_spd(spd_address, (void *)info->Buffer, CONFIG_DIMM_SPD_SIZE);
+
 	if (err)
 		return AGESA_ERROR;
+
 	return AGESA_SUCCESS;
 }
+
+/* Allow mainboards to fill the SPD buffer */
+__attribute__((weak)) int mainboard_read_spd(uint8_t spdAddress, char *buf,
+						size_t len)
+{
+	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
+	return -1; /* SPD not read */
+}

-- 
To view, visit https://review.coreboot.org/22485
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id42622008b49b4559e648a7fa1bfd9f26e1f56a4
Gerrit-Change-Number: 22485
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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