[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Get entire DDR4 SPD

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/22484


Change subject: soc/amd/stoneyridge: Get entire DDR4 SPD
......................................................................

soc/amd/stoneyridge: Get entire DDR4 SPD

Set the SPD size to 512 to get the entire DDR4 SPD.

Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/dimm_spd.c
2 files changed, 5 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/22484/1

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 446c451..7f44883 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -352,4 +352,8 @@
 comment "AMD Firmware Directory Table set to location for 16MB ROM"
 	depends on AMD_FWM_POSITION_INDEX = 5
 
+config DIMM_SPD_SIZE
+	int
+	default 512	# DDR4
+
 endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
diff --git a/src/soc/amd/stoneyridge/dimm_spd.c b/src/soc/amd/stoneyridge/dimm_spd.c
index 13fd72f..ee58e9b 100644
--- a/src/soc/amd/stoneyridge/dimm_spd.c
+++ b/src/soc/amd/stoneyridge/dimm_spd.c
@@ -40,7 +40,7 @@
 		[info->SocketId][info->MemChannelId][info->DimmId];
 	if (spd_address == 0)
 		return AGESA_ERROR;
-	int err = sb_read_spd(spd_address, (void *)info->Buffer, 128);
+	int err = sb_read_spd(spd_address, (void *)info->Buffer, CONFIG_DIMM_SPD_SIZE);
 	if (err)
 		return AGESA_ERROR;
 	return AGESA_SUCCESS;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d
Gerrit-Change-Number: 22484
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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