[coreboot-gerrit] Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Enable SCI

[Shaunak Saha (Code Review)]

Hello Vaibhav Shankar, AndreX Andraos, Freddy Paul, Lijian Zhao, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/22366

to look at the new patch set (#2).

Change subject: mainboard/intel/cannonlake_rvp: Enable SCI
......................................................................

mainboard/intel/cannonlake_rvp: Enable SCI

This patch enables SCI in cnl_rvp boards. We do not have a dedicated
gpio for runtime SCI now, eSPI ec will have virtual wire SCI.

TEST= Board boots and one short press of power button we can see the
      counter in /sys/firmware/acpi/interrupts/sci is incrementing.

Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>

Change-Id: If1a622449792dad47be3d0c23bbe944e6941996b
---
M src/mainboard/intel/cannonlake_rvp/dsdt.asl
M src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/gpio.h
2 files changed, 22 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/22366/2
-- 
To view, visit https://review.coreboot.org/22366
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: If1a622449792dad47be3d0c23bbe944e6941996b
Gerrit-Change-Number: 22366
Gerrit-PatchSet: 2
Gerrit-Owner: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: AndreX Andraos <andrex.andraos at intel.com>
Gerrit-Reviewer: Freddy Paul <freddy.paul at intel.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar at intel.com>
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