[coreboot-gerrit] Change in coreboot[master]: rockchip/rk3399: mipi: feedback divider register high value only 4 bit
Lin Huang (Code Review)
gerrit at coreboot.org
Thu Nov 16 04:40:19 CET 2017
Lin Huang has uploaded this change for review. ( https://review.coreboot.org/22478
Change subject: rockchip/rk3399: mipi: feedback divider register high value only 4 bit
......................................................................
rockchip/rk3399: mipi: feedback divider register high value only 4 bit
Accroding databook, feedback divider register high value only
4 bit, it used 5 bit before, correct it.
Change-Id: I1fe9fc076b712f27407c5f2735b15e64fb55e72e
Signed-off-by: Lin Huang <hl at rock-chips.com>
---
M src/soc/rockchip/rk3399/include/soc/mipi.h
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/22478/1
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index 2dfbc52..a33dc71 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -197,7 +197,7 @@
#define LOW_PROGRAM_EN 0
#define HIGH_PROGRAM_EN BIT(7)
#define LOOP_DIV_LOW_SEL(val) ((val - 1) & 0x1f)
-#define LOOP_DIV_HIGH_SEL(val) (((val - 1) >> 5) & 0x1f)
+#define LOOP_DIV_HIGH_SEL(val) (((val - 1) >> 5) & 0x0f)
#define PLL_LOOP_DIV_EN BIT(5)
#define PLL_INPUT_DIV_EN BIT(4)
--
To view, visit https://review.coreboot.org/22478
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1fe9fc076b712f27407c5f2735b15e64fb55e72e
Gerrit-Change-Number: 22478
Gerrit-PatchSet: 1
Gerrit-Owner: Lin Huang <hl at rock-chips.com>
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