[coreboot-gerrit] Change in coreboot[master]: Mainboard carrizo_fch.asl: move code to soc
Richard Spiegel (Code Review)
gerrit at coreboot.org
Mon Nov 13 20:18:05 CET 2017
Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/22455
Change subject: Mainboard carrizo_fch.asl: move code to soc
......................................................................
Mainboard carrizo_fch.asl: move code to soc
Code within carrizo_fch should be SOC specific instead of board specific.
BUG=b:64034810
Change-Id: I5de2020411794bfcd3730789f62af9c9834a018b
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
D src/mainboard/amd/gardenia/acpi/carrizo_fch.asl
M src/mainboard/amd/gardenia/dsdt.asl
M src/mainboard/google/kahlee/dsdt.asl
R src/soc/amd/stoneyridge/acpi/soc_fch.asl
4 files changed, 3 insertions(+), 122 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/22455/1
diff --git a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl
deleted file mode 100644
index 954ab43..0000000
--- a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-Device(AAHB) {
- Name(_HID,"AAHB0000")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate()
- {
- IRQ(Edge, ActiveHigh, Exclusive) {7}
- Memory32Fixed(ReadWrite, 0xFEDC0000, 0x2000)
- })
-
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(GPIO) {
- Name (_HID, "AMD0030")
- Name (_CID, "AMD0030")
- Name(_UID, 0)
-
- Name(_CRS, ResourceTemplate() {
- Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
- Memory32Fixed(ReadWrite, 0xFED81500, 0x300)
- })
-
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(FUR0) {
- Name(_HID,"AMD0020")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {10}
- Memory32Fixed(ReadWrite, 0xFEDC6000, 0x2000)
- })
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(FUR1) {
- Name(_HID,"AMD0020")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {11}
- Memory32Fixed(ReadWrite, 0xFEDC8000, 0x2000)
- })
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(I2CA) {
- Name(_HID,"AMD0010")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {3}
- Memory32Fixed(ReadWrite, 0xFEDC2000, 0x1000)
- })
-
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(I2CB)
-{
- Name(_HID,"AMD0010")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {15}
- Memory32Fixed(ReadWrite, 0xFEDC3000, 0x1000)
- })
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(I2CC) {
- Name(_HID,"AMD0010")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {6}
- Memory32Fixed(ReadWrite, 0xFEDC4000, 0x1000)
- })
-
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
-
-Device(I2CD)
-{
- Name(_HID,"AMD0010")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {14}
- Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000)
- })
- Method (_STA, 0x0, NotSerialized) {
- Return (0x0F)
- }
-}
diff --git a/src/mainboard/amd/gardenia/dsdt.asl b/src/mainboard/amd/gardenia/dsdt.asl
index 77e6230..a65893d 100644
--- a/src/mainboard/amd/gardenia/dsdt.asl
+++ b/src/mainboard/amd/gardenia/dsdt.asl
@@ -70,7 +70,7 @@
#include <pci_int.asl>
/* Describe the devices in the Southbridge */
- #include "acpi/carrizo_fch.asl"
+ #include <soc_fch.asl>
} /* End \_SB scope */
diff --git a/src/mainboard/google/kahlee/dsdt.asl b/src/mainboard/google/kahlee/dsdt.asl
index f3f8aaa..ed34f9d 100644
--- a/src/mainboard/google/kahlee/dsdt.asl
+++ b/src/mainboard/google/kahlee/dsdt.asl
@@ -73,7 +73,7 @@
#include <pci_int.asl>
/* Describe the devices in the Southbridge */
- #include "acpi/carrizo_fch.asl"
+ #include <soc_fch.asl>
} /* End \_SB scope */
diff --git a/src/mainboard/google/kahlee/acpi/carrizo_fch.asl b/src/soc/amd/stoneyridge/acpi/soc_fch.asl
similarity index 97%
rename from src/mainboard/google/kahlee/acpi/carrizo_fch.asl
rename to src/soc/amd/stoneyridge/acpi/soc_fch.asl
index 9bf7dec..f0de3b9 100644
--- a/src/mainboard/google/kahlee/acpi/carrizo_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/soc_fch.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
--
To view, visit https://review.coreboot.org/22455
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5de2020411794bfcd3730789f62af9c9834a018b
Gerrit-Change-Number: 22455
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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