[coreboot-gerrit] Change in coreboot[master]: mb/google/eve: Add DSP calibration clock name/rate for RT5514
Duncan Laurie (Code Review)
gerrit at coreboot.org
Mon Nov 13 16:29:11 CET 2017
Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/22451
Change subject: mb/google/eve: Add DSP calibration clock name/rate for RT5514
......................................................................
mb/google/eve: Add DSP calibration clock name/rate for RT5514
Add a property for DSP calibration clock name and rate such that
RT5514 codec driver can control ssp1_mclk for DSP clock calibration.
BUG=b:67763576
TEST=boot on eve check RT5514 codec driver can get this device
property.
Change-Id: Icf9695ef67efb2bb073e39b2ece02d57f0460a0c
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Original-Signed-off-by: Cheng-Yi Chiang <cychiang at chromium.org>
Original-Change-Id: Ie204dda81a099f23beb20be71380a8494a9bee31
Original-Reviewed-on: https://chromium-review.googlesource.com/756261
Original-Reviewed-by: Dylan Reid <dgreid at chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie at google.com>
---
M src/mainboard/google/eve/devicetree.cb
1 file changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/22451/1
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index 30a327e..a0b0ea6 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -310,11 +310,19 @@
register "hid" = ""10EC5514""
register "name" = ""RT54""
register "desc" = ""Realtek RT5514""
- register "property_count" = "1"
+ register "property_count" = "3"
# Set the DMIC initial delay to 16ms to avoid pop noise
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,dmic-init-delay""
register "property_list[0].integer" = "16"
+ # Set clock name for RT5514 to calibrate DSP clock.
+ register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
+ register "property_list[1].name" = ""realtek,dsp-calib-clk-name""
+ register "property_list[1].string" = ""ssp1_mclk""
+ # Set clock rate for RT5514 to calibrate DSP clock.
+ register "property_list[2].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[2].name" = ""realtek,dsp-calib-clk-rate""
+ register "property_list[2].integer" = "24000000"
device i2c 57 on end
end
end # I2C #4
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Icf9695ef67efb2bb073e39b2ece02d57f0460a0c
Gerrit-Change-Number: 22451
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
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