[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Define default LPSS clock

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/22403


Change subject: soc/intel/cannonlake: Define default LPSS clock
......................................................................

soc/intel/cannonlake: Define default LPSS clock

Default LPSS clock need to be defined for SOC.

TEST=Turn on COMMON_I2C_DEBUG, add I2C clock entry and check I2C
programing properly during coreboot.

Change-Id: I2c6b9bb23950b09f6f05e3ef762ccb1a260efc5f
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/22403/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 92aad28..c6fb59f 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -130,6 +130,10 @@
 	int
 	default 100
 
+config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ
+	int
+	default 120
+
 config SOC_INTEL_COMMON_BLOCK_GSPI_MAX
 	int
 	default 3

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2c6b9bb23950b09f6f05e3ef762ccb1a260efc5f
Gerrit-Change-Number: 22403
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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