[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add GNVS variables for thermal control

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/22398


Change subject: soc/amd/stoneyridge: Add GNVS variables for thermal control
......................................................................

soc/amd/stoneyridge: Add GNVS variables for thermal control

BUG=b:67999819

Change-Id: I78db830c14092f5e918657e62bf38ab7124b1646
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/stoneyridge/acpi/globalnvs.asl
M src/soc/amd/stoneyridge/include/soc/nvs.h
2 files changed, 13 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/22398/1

diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
index bf0ed55..7e696aa 100644
--- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl
+++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
@@ -41,6 +41,12 @@
 	PRT0,	32,     // 0x25 - 0x28 - PERST_0 Address
 	SCDP,	8,      // 0x29 - SD_CD GPIO portid
 	SCDO,	8,      // 0x2A - GPIO pad offset relative to the community
+	TMPS,	8,	// 0x2B - Temperature Sensor ID
+	TLVL,	8,	// 0x2C - Throttle Level Limit
+	FLVL,	8,	// 0x2D - Current FAN Level
+	TCRT,	8,	// 0x2E - Critical Threshold
+	TPSV,	8,	// 0x2F - Passive Threshold
+	TMAX,	8,	// 0x30 - CPU Tj_max
 	/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
 	Offset (0x100),
 	#include <vendorcode/google/chromeos/acpi/gnvs.asl>
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 623c554..b4f7213 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -44,7 +44,13 @@
 	uint32_t	prt0; /* 0x25 - 0x28 - PERST_0 Address */
 	uint8_t		scdp; /* 0x29 - SD_CD GPIO portid */
 	uint8_t		scdo; /* 0x2A - GPIO pad offset relative to the community */
-	uint8_t		unused[213];
+	uint8_t		tmps; /* 0x2B - Temperature Sensor ID */
+	uint8_t		tlvl; /* 0x2C - Throttle Level Limit */
+	uint8_t		flvl; /* 0x2D - Current FAN Level */
+	uint8_t		tcrt; /* 0x2E - Critical Threshold */
+	uint8_t		tpsv; /* 0x2F - Passive Threshold */
+	uint8_t		tmax; /* 0x30 - CPU Tj_max */
+	uint8_t		unused[207];
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t chromeos;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I78db830c14092f5e918657e62bf38ab7124b1646
Gerrit-Change-Number: 22398
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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