[coreboot-gerrit] Change in coreboot[master]: util/inteltool: Add Skylake DMIBAR register dumping

[Maximilian Schander (Code Review)]

Hello Jonathan Neuschäfer, build bot (Jenkins), Nico Huber, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/22345

to look at the new patch set (#3).

Change subject: util/inteltool: Add Skylake DMIBAR register dumping
......................................................................

util/inteltool: Add Skylake DMIBAR register dumping

Register definitions were taken from
 * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2
 * Page 117
 * 332688-003EN

Tested on a 6th gen skylake mobile cpu and capability registers do match up
with the default values.

Change-Id: I636f6c3d045e297f1439d3e88e43f41e03db4c8e
Signed-off-by: Maximilian Schander <coreboot at mimoja.de>
---
M util/inteltool/pcie.c
1 file changed, 70 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/22345/3
-- 
To view, visit https://review.coreboot.org/22345
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I636f6c3d045e297f1439d3e88e43f41e03db4c8e
Gerrit-Change-Number: 22345
Gerrit-PatchSet: 3
Gerrit-Owner: Maximilian Schander <coreboot at mimoja.de>
Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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