[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: enable 8254 Static Clock Gating for XTAL shutdown

[Roy Mingi Park (Code Review)]

Roy Mingi Park has uploaded this change for review. ( https://review.coreboot.org/22299


Change subject: mb/google/poppy: enable 8254 Static Clock Gating for XTAL shutdown
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mb/google/poppy: enable 8254 Static Clock Gating for XTAL shutdown

8254 Static Clock Gating should be enabled on poppy board for XTAL
OSC shutdown which has a power impact.

BUG=b:36630881
BRANCH=master
TEST=Build for poppy board with the clock_gate_8254 policy in
devicetree set to 1.
iotools mmio_read32 0xfdc43300 should return 0x1f

Change-Id: I581ae4ac88ef4b02ae46454700edc2a5dab3b502
Signed-off-by: Roy Mingi Park <roy.mingi.park at intel.com>
---
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/22299/1

diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 61b16e6..b639824 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -60,6 +60,7 @@
 	register "PmConfigSlpSusMinAssert" = "1"       # 500ms
 	register "PmConfigSlpAMinAssert" = "3"         # 2s
 	register "PmTimerDisabled" = "1"
+	register "clock_gate_8254" = "1"               # CGE for 8254 PIT 
 
 	register "pirqa_routing" = "PCH_IRQ11"
 	register "pirqb_routing" = "PCH_IRQ10"

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I581ae4ac88ef4b02ae46454700edc2a5dab3b502
Gerrit-Change-Number: 22299
Gerrit-PatchSet: 1
Gerrit-Owner: Roy Mingi Park <roy.mingi.park at intel.com>
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