[coreboot-gerrit] Change in coreboot[master]: mb/google/fizz: Enable NIC leds

[Gaggery Tsai (Code Review)]

Hello Gaggery Tsai,

I'd like you to do a code review. Please visit

    https://review.coreboot.org/22293

to review the following change.


Change subject: mb/google/fizz: Enable NIC leds
......................................................................

mb/google/fizz: Enable NIC leds

This patch enables customized NIC leds as following:

	Green	Orange(Amber)
100M	off	blinking
1000M	on	blinking

BUG=b:65437780
TEST=Make sure the registers are programmed as expected and observe the
	LEDs are behaving as expected. Do suspend/resume test and the LEDs are
	still working as expected.

Change-Id: I9bb1367a4c742c2755d620e14ee6dfe70ee7f34b
Signed-off-by: Gaggery Tsai <gaggery.tsai at intel.corp-partner.google.com>
---
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/fizz/devicetree.cb
2 files changed, 9 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/22293/1

diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig
index 8036b8b..5bed63a 100644
--- a/src/mainboard/google/fizz/Kconfig
+++ b/src/mainboard/google/fizz/Kconfig
@@ -18,6 +18,7 @@
 	select FIZZ_USE_SPI_TPM
 	select GENERIC_SPD_BIN
 	select RT8168_GET_MAC_FROM_VPD
+	select RT8168_SET_LED_MODE
 	select SPD_READ_BY_WORD
 
 config VBOOT
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 1590252..73a5c50 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -302,9 +302,15 @@
 			end
 		end # I2C #5
 		device pci 19.2 off  end # I2C #4
-		device pci 1c.0 on end # PCI Express Port 1
+		device pci 1c.0 on # PCI Express Port 1
+			chip drivers/net
+				register "customized_leds" = "0x0fa7"
+				device pci 00.0 on end
+			end
+		end # PCI Express Port 1
 		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 on end # PCI Express Port 3 for LAN
+		# PCI Express Port 3 for LAN, but will be swapped to port 1
+		device pci 1c.2 on end
 		device pci 1c.3 on
 			chip drivers/intel/wifi
 				register "wake" = "GPE0_PCI_EXP"

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9bb1367a4c742c2755d620e14ee6dfe70ee7f34b
Gerrit-Change-Number: 22293
Gerrit-PatchSet: 1
Gerrit-Owner: Gaggery Tsai <gaggery.tsai at intel.com>
Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai at intel.corp-partner.google.com>
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