[coreboot-gerrit] Change in coreboot[master]: WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
Marshall Dawson (Code Review)
gerrit at coreboot.org
Wed May 31 01:53:38 CEST 2017
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19755
to look at the new patch set (#4).
Change subject: WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
......................................................................
WIP soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
Add dedicated CAR setup and teardown functions and, Kconfig
options to force their inclusion into the build. The .S files
are effectively duplicated code from the cache_as_ram.inc file.
The .S files use global proc names in anticipation for use with
the Kconfig symbols C_ENVIRONMENT_BOOTBLOCK and POSTCAR_STAGE.
Move the mainboard romstage functionality into the soc directory
and change the function name to be compatible with the call
from assembly_entry.S.
Move InitReset and InitEarly to bootblock. These AGESA entry
points set some default settings, and release/recapture the
AP cores.
todo:
* preserve BIST
Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/cpu/x86/lapic/Makefile.inc
M src/mainboard/amd/gardenia/BiosCallOuts.c
M src/mainboard/amd/gardenia/Makefile.inc
M src/mainboard/amd/gardenia/OemCustomize.c
A src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c
A src/mainboard/amd/gardenia/bootblock/OemCustomize.c
M src/mainboard/amd/gardenia/romstage.c
M src/soc/amd/common/Makefile.inc
A src/soc/amd/common/block/cpu/Kconfig
A src/soc/amd/common/block/cpu/Makefile.inc
A src/soc/amd/common/block/cpu/car/cache_as_ram.S
A src/soc/amd/common/block/cpu/car/exit_car.S
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/amd/stoneyridge/bootblock/bootblock.c
A src/soc/amd/stoneyridge/bootblock/fch.c
M src/soc/amd/stoneyridge/early_setup.c
M src/soc/amd/stoneyridge/include/soc/hudson.h
M src/soc/amd/stoneyridge/include/soc/northbridge.h
A src/soc/amd/stoneyridge/romstage.c
M src/vendorcode/amd/pi/Makefile.inc
21 files changed, 954 insertions(+), 327 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/19755/4
--
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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