[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/gpio: Port gpio code from Apollolake ...

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19759 )

Change subject: soc/intel/common/block/gpio: Port gpio code from Apollolake to common
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Patch Set 15:

(3 comments)

https://review.coreboot.org/#/c/19759/15/src/soc/intel/common/block/gpio/gpio.c
File src/soc/intel/common/block/gpio/gpio.c:

PS15, Line 54: 32
can we use macro


PS15, Line 68: GPIO_MAX_NUM_PER_GROUP
each GPP may not have same PIN count


Line 136: 	if (IS_ENABLED(CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO))
we can't assume PAD configuration may be only 8 byte width, some future soc may have 16 byte. hence we may have pad_conf2, 3 etc.

I was wondering if we can get rid of unifying GPIO driver code for all possible socs. It may be bloated and tough to maintain.

I have an opinion to use separate GPIO driver for below socs 
GPIO_V1 =  SKL & KBL
GPIO_V2 = APL & GLK (if possible) 
GPIO_V3 = Some future SOC
this will help to maintain respective GPIO API neatly. Then we may try to common those GPIO macro definitions as i guess majority of those are same.

I don't see much scope to use this code for future socs w/o any modification. testing and maintenance might be tougher.


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Gerrit-Change-Id: Ic48401e92103ff0ec278fb69a3d304148a2d79aa
Gerrit-PatchSet: 15
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