[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Remove unecessary reserved resources

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded a new change for review. ( https://review.coreboot.org/19977 )

Change subject: nb/intel/sandybridge: Remove unecessary reserved resources
......................................................................

nb/intel/sandybridge: Remove unecessary reserved resources

The reserved "bad_ram_resources" at 0x20000000 and
0x40000000 were originally implemented to work around an i915 bug
on SNB, but that bug has long since been fixed.  Commit
593e7de restricted these regions to SNB, but was never tested against
SNB which would have likely shown it to no longer being needed.

Said commit also failed to guard the corresponding region definitions
in ACPI, so remove the reserved regions from both places.

TEST: boot Linux w/recent (4.0+) kernel on google/parrot (SNB, IVB)
and samsung/stumpy (SNB), observe lack of graphics corruption.

Change-Id: I9e14a73dbdb9d62dfd7d942a79659a5997f97971
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/northbridge/intel/sandybridge/acpi/sandybridge.asl
M src/northbridge/intel/sandybridge/northbridge.c
2 files changed, 0 insertions(+), 10 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/19977/1

diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
index 61537e8..b3ae2ff 100644
--- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
@@ -37,10 +37,6 @@
 		Memory32Fixed(ReadWrite, CONFIG_CHROMEOS_RAMOOPS_RAM_START,
 					 CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE)
 #endif
-
-		/* Required for SandyBridge sighting 3715511 */
-		Memory32Fixed(ReadWrite, 0x20000000, 0x00200000)
-		Memory32Fixed(ReadWrite, 0x40000000, 0x00200000)
 	})
 
 	// Current Resource Settings
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 5c5f41a..4eeb415 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -106,12 +106,6 @@
 			CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE >> 10);
 #endif
 
-	if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
-		/* Required for SandyBridge sighting 3715511 */
-		bad_ram_resource(dev, index++, 0x20000000 >> 10, 0x00200000 >> 10);
-		bad_ram_resource(dev, index++, 0x40000000 >> 10, 0x00200000 >> 10);
-	}
-
 	/* Reserve IOMMU BARs */
 	const u32 capid0_a = pci_read_config32(dev, 0xe4);
 	if (!(capid0_a & (1 << 23))) {

-- 
To view, visit https://review.coreboot.org/19977
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: I9e14a73dbdb9d62dfd7d942a79659a5997f97971
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>