[coreboot-gerrit] Change in coreboot[master]: google/jecht: add board-specific USB port info
Matt DeVillier (Code Review)
gerrit at coreboot.org
Sun May 28 20:00:16 CEST 2017
Matt DeVillier has uploaded a new change for review. ( https://review.coreboot.org/19971 )
Change subject: google/jecht: add board-specific USB port info
......................................................................
google/jecht: add board-specific USB port info
Add capability and location data for USB ports/devices via
_PLD and _UPC ACPI methods, which is utilized by Windows and
required by macOS.
Each jecht variant has a different USB port config.
Change-Id: I3b15aac9c4971e2ae230106016fba3a583ec6c9a
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/mainboard/google/jecht/acpi/mainboard.asl
A src/mainboard/google/jecht/variants/guado/include/variant/acpi/usb.asl
A src/mainboard/google/jecht/variants/jecht/include/variant/acpi/usb.asl
A src/mainboard/google/jecht/variants/rikku/include/variant/acpi/usb.asl
A src/mainboard/google/jecht/variants/tidus/include/variant/acpi/usb.asl
5 files changed, 163 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/19971/1
diff --git a/src/mainboard/google/jecht/acpi/mainboard.asl b/src/mainboard/google/jecht/acpi/mainboard.asl
index 16e6352..4b2d9ca 100644
--- a/src/mainboard/google/jecht/acpi/mainboard.asl
+++ b/src/mainboard/google/jecht/acpi/mainboard.asl
@@ -67,3 +67,6 @@
}
}
}
+
+/* USB port entries */
+#include <variant/acpi/usb.asl>
diff --git a/src/mainboard/google/jecht/variants/guado/include/variant/acpi/usb.asl b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/usb.asl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/usb.asl
diff --git a/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/usb.asl b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/usb.asl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/usb.asl
diff --git a/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/usb.asl b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/usb.asl
new file mode 100644
index 0000000..52d7e3e
--- /dev/null
+++ b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/usb.asl
@@ -0,0 +1,160 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.XHCI.HUB7.PRT2)
+{
+ // Front Top USB 2.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ Zero, // USB Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (One))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT3)
+{
+ // Front Bottom USB 2.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ Zero, // USB Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (One))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT4)
+{
+ // Bluetooth
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0xFF, // OEM Connector
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Not Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (Zero))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT5)
+{
+ // Back Right USB 2.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ Zero, // USB Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (One))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT6)
+{
+ // Back Left USB 2.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ Zero, // USB Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (One))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.PRT7)
+{
+ // SD Card
+ // Connected, OEM Connector, Reserved, Reserved
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0xFF, // OEM Connector
+ Zero, // Reserved
+ Zero // Reserved
+ })
+
+ // Not Visible
+ Method (_PLD, 0, NotSerialized)
+ {
+ Return (GPLD (Zero))
+ }
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP3)
+{
+ // Front Top USB 3.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0x03, // USB 3.0 Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP4)
+{
+ // Front Bottom USB 3.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0x03, // USB 3.0 Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP5)
+{
+ // Back Right USB 3.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0x03, // USB 3.0 Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+}
+Scope (\_SB.PCI0.XHCI.HUB7.SSP6)
+{
+ // Back Left USB 3.0
+ Name (_UPC, Package (0x04)
+ {
+ 0xFF, // Connectable
+ 0x03, // USB 3.0 Port
+ Zero, // Reserved
+ Zero // Reserved
+ })
+}
diff --git a/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/usb.asl b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/usb.asl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/usb.asl
--
To view, visit https://review.coreboot.org/19971
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I3b15aac9c4971e2ae230106016fba3a583ec6c9a
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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