[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x/raminit: Limit DDR3 to 400MHz

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19919 )

Change subject: nb/intel/x4x/raminit: Limit DDR3 to 400MHz
......................................................................

nb/intel/x4x/raminit: Limit DDR3 to 400MHz

Faster does not seem to boot, while limiting it to this frequency
makes it reliable.

TESTED on Asrock g41c-gs with 1 1Rx8 2G in both channels;
       on Gigabyte ga-g41mt-es2l (with ga-g41m-es2l code) with 2G,
       2+4G, 4+4G even with ECC DIMMs on which vendor bails out.
       (ECC is not supported)

Change-Id: I120b22ca8febc5a3644339045218e997d8e8496e
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/x4x/spd_ddr3_decode.c
1 file changed, 1 insertion(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/19919/1

diff --git a/src/northbridge/intel/x4x/spd_ddr3_decode.c b/src/northbridge/intel/x4x/spd_ddr3_decode.c
index eab0548..0a99e4d 100644
--- a/src/northbridge/intel/x4x/spd_ddr3_decode.c
+++ b/src/northbridge/intel/x4x/spd_ddr3_decode.c
@@ -82,6 +82,7 @@
 	}
 
 	min_tCLK = MAX(min_tCLK, saved_timings->min_tclk);
+	min_tCLK = TCK_400MHZ; /* FIXME: faster frequency fail */
 	normalize_tCLK(&min_tCLK);
 	if (min_tCLK == 0) {
 		printk(BIOS_ERR, "DRAM frequency is under lowest supported "

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I120b22ca8febc5a3644339045218e997d8e8496e
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>