[coreboot-gerrit] Change in coreboot[master]: purism/librem13v2: Fix GPIO settings and enable P2SB device
Youness Alaoui (Code Review)
gerrit at coreboot.org
Wed May 24 23:32:16 CEST 2017
Youness Alaoui has uploaded a new change for review. ( https://review.coreboot.org/19892 )
Change subject: purism/librem13v2: Fix GPIO settings and enable P2SB device
......................................................................
purism/librem13v2: Fix GPIO settings and enable P2SB device
Some GPIOs were not matching exactly with the GPIO settings
from the factory BIOS and the P2SB device being disabled (which
I was confusing with hidden) was causing all sorts of problems.
Change-Id: I2622ce81250dacdc06b1e64f2970eaef901d0bf3
Signed-off-by: Youness Alaoui <youness.alaoui at puri.sm>
---
M src/mainboard/purism/librem13v2/devicetree.cb
M src/mainboard/purism/librem13v2/gpio.h
2 files changed, 13 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/19892/1
diff --git a/src/mainboard/purism/librem13v2/devicetree.cb b/src/mainboard/purism/librem13v2/devicetree.cb
index f37882a..7f6bcae 100644
--- a/src/mainboard/purism/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem13v2/devicetree.cb
@@ -207,7 +207,7 @@
device pnp 0c09.0 on end
end
end # LPC Interface
- device pci 1f.1 off end # P2SB
+ device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
diff --git a/src/mainboard/purism/librem13v2/gpio.h b/src/mainboard/purism/librem13v2/gpio.h
index 01540b5..1f2c943 100644
--- a/src/mainboard/purism/librem13v2/gpio.h
+++ b/src/mainboard/purism/librem13v2/gpio.h
@@ -26,7 +26,7 @@
#define PAD_CFG_NF_1V8(pad_, term_, rst_, func_) \
_PAD_CFG_ATTRS(pad_, term_, \
_DW0_VALS(rst_, RAW, NO, DRIVE0, NO, NO, \
- NO, NO, NO, NO, func_, NO, NO), PAD_FIELD(PAD_TOL, 1V8))
+ NO, NO, NO, NO, func_, YES, YES), PAD_FIELD(PAD_TOL, 1V8))
/* Redefine PAD_CFG_GPI using DRIVE0 RXEVCFG value */
#undef PAD_CFG_GPI
@@ -205,7 +205,7 @@
/* USB2_OC3# */ PAD_CFG_NC(GPP_E12),
/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
-/* DDPD_HPD2 */ PAD_CFG_NC_EVCFG(GPP_E15, EDGE, 0),
+/* DDPD_HPD2 */ PAD_CFG_NC_RXINV(GPP_E15, EDGE),
/* DDPE_HPD3 */ PAD_CFG_GPI_ACPI_SCI(GPP_E16, NONE, PLTRST, NO),
/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
/* DDPB_CTRLCLK */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
@@ -247,19 +247,19 @@
/* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
/* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
/* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
-/* SD_WP */ PAD_CFG_NF(GPP_G7, NONE, DEEP, NF1),
+/* SD_WP */ PAD_CFG_NF(GPP_G7, 20K_PU, DEEP, NF1),
/* BATLOW# */ PAD_CFG_NC(GPD0),
-/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, RSMRST, NF1),
+/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, DSW_PWROK, NF1),
/* LAN_WAKE# */ PAD_CFG_NC_EVCFG(GPD2, LEVEL, 0),
-/* PWRBTN# */ PAD_CFG_NF(GPD3, 20K_PU, RSMRST, NF1),
-/* SLP_S3# */ PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
-/* SLP_S4# */ PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
-/* SLP_A# */ PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),
-/* RSVD */ PAD_CFG_NC(GPD7),
-/* SUSCLK */ PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),
-/* SLP_WLAN# */ PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),
-/* SLP_S5# */ PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),
+/* PWRBTN# */ PAD_CFG_NF(GPD3, 20K_PU, DSW_PWROK, NF1),
+/* SLP_S3# */ PAD_CFG_NF(GPD4, NONE, DSW_PWROK, NF1),
+/* SLP_S4# */ PAD_CFG_NF(GPD5, NONE, DSW_PWROK, NF1),
+/* SLP_A# */ PAD_CFG_NF(GPD6, NONE, DSW_PWROK, NF1),
+/* RSVD */ PAD_CFG_NC_1(GPD7),
+/* SUSCLK */ PAD_CFG_NF(GPD8, NONE, DSW_PWROK, NF1),
+/* SLP_WLAN# */ PAD_CFG_NF(GPD9, NONE, DSW_PWROK, NF1),
+/* SLP_S5# */ PAD_CFG_NF(GPD10, NONE, DSW_PWROK, NF1),
/* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
};
--
To view, visit https://review.coreboot.org/19892
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I2622ce81250dacdc06b1e64f2970eaef901d0bf3
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Youness Alaoui <snifikino at gmail.com>
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