[coreboot-gerrit] Change in coreboot[master]: rk3399: Reshuffle memlayout to move PRERAM_CBMEM_CONSOLE fur...
Martin Roth (Code Review)
gerrit at coreboot.org
Wed May 24 16:30:45 CEST 2017
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19784 )
Change subject: rk3399: Reshuffle memlayout to move PRERAM_CBMEM_CONSOLE further back
......................................................................
rk3399: Reshuffle memlayout to move PRERAM_CBMEM_CONSOLE further back
It seems that the BootROM on the RK3399 overwrites some of the earlier
parts of SRAM, including the PRERAM_CBMEM_CONSOLE area. Now that we have
a persistent CBMEM console we want that area to survive in case of an
early (pre-CBMEM) reboot, so shuffle the layout around a bit to move it
further back. (This reduces the stack size to 12KB which should still be
way more than enough.)
Change-Id: Ifc1e568cda334394134bba9eba75088032d2ff13
Signed-off-by: Julius Werner <jwerner at chromium.org>
Reviewed-on: https://review.coreboot.org/19784
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-by: Furquan Shaikh <furquan at google.com>
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
M src/soc/rockchip/rk3399/include/soc/memlayout.ld
1 file changed, 6 insertions(+), 6 deletions(-)
Approvals:
Aaron Durbin: Looks good to me, approved
Paul Menzel: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
index f440dfb..04ffce6 100644
--- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld
@@ -29,13 +29,13 @@
SYMBOL(epmu_sram, 0xFF3B2000)
SRAM_START(0xFF8C0000)
- PRERAM_CBMEM_CONSOLE(0xFF8C0000, 7K)
+ PRERAM_CBFS_CACHE(0xFF8C0000, 7K)
TIMESTAMP(0xFF8C1C00, 1K)
BOOTBLOCK(0xFF8C2004, 36K - 4)
- PRERAM_CBFS_CACHE(0xFF8CB000, 4K)
- OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CC000, 92K)
- VBOOT2_WORK(0XFF8E3000, 12K)
- TTB(0xFF8E6000, 24K)
- STACK(0xFF8EC000, 16K)
+ OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CB000, 92K)
+ VBOOT2_WORK(0XFF8E2000, 12K)
+ TTB(0xFF8E5000, 24K)
+ PRERAM_CBMEM_CONSOLE(0xFF8EB000, 8K)
+ STACK(0xFF8ED000, 12K)
SRAM_END(0xFF8F0000)
}
--
To view, visit https://review.coreboot.org/19784
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: merged
Gerrit-Change-Id: Ifc1e568cda334394134bba9eba75088032d2ff13
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
More information about the coreboot-gerrit
mailing list