[coreboot-gerrit] Change in coreboot[master]: google/kahlee: Fix ASL whitespace and formatting
Marc Jones (Code Review)
gerrit at coreboot.org
Wed May 24 01:07:17 CEST 2017
Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19843 )
Change subject: google/kahlee: Fix ASL whitespace and formatting
......................................................................
google/kahlee: Fix ASL whitespace and formatting
Clean up the ASL whitespace and formatting to match the iasl -d
style as other parts of coreboot.
Change-Id: I61689cb55dc26cbad160d45aa0a36c00b386fe0c
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/mainboard/google/kahlee/acpi/carrizo_fch.asl
M src/mainboard/google/kahlee/acpi/gpe.asl
M src/mainboard/google/kahlee/acpi/mainboard.asl
M src/mainboard/google/kahlee/acpi/routing.asl
M src/mainboard/google/kahlee/acpi/sleep.asl
M src/mainboard/google/kahlee/acpi/usb_oc.asl
6 files changed, 287 insertions(+), 243 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/19843/1
diff --git a/src/mainboard/google/kahlee/acpi/carrizo_fch.asl b/src/mainboard/google/kahlee/acpi/carrizo_fch.asl
index e3e8e9a..04f563e 100644
--- a/src/mainboard/google/kahlee/acpi/carrizo_fch.asl
+++ b/src/mainboard/google/kahlee/acpi/carrizo_fch.asl
@@ -13,106 +13,124 @@
* GNU General Public License for more details.
*/
-Device(AAHB) {
- Name(_HID,"AAHB0000")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate()
+Device (AAHB)
+{
+ Name (_HID, "AAHB0000")
+ Name (_UID, 0x0)
+ Name (_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadWrite, 0xFEDC0000, 0x2000)
+ Memory32Fixed (ReadWrite, 0xFEDC0000, 0x2000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(GPIO) {
+Device (GPIO)
+{
Name (_HID, "AMD0030")
Name (_CID, "AMD0030")
Name(_UID, 0)
- Name(_CRS, ResourceTemplate() {
- Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
- Memory32Fixed(ReadWrite, 0xFED81500, 0x300)
+ Name (_CRS, ResourceTemplate()
+ {
+ Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
+ { 7 }
+ Memory32Fixed (ReadWrite, 0xFED81500, 0x300)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(FUR0) {
- Name(_HID,"AMD0020")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {10}
- Memory32Fixed(ReadWrite, 0xFEDC6000, 0x2000)
+Device (FUR0)
+{
+ Name (_HID, "AMD0020")
+ Name (_UID, 0x0)
+ Name (_CRS, ResourceTemplate()
+ {
+ IRQ (Edge, ActiveHigh, Exclusive) { 10 }
+ Memory32Fixed (ReadWrite, 0xFEDC6000, 0x2000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(FUR1) {
- Name(_HID,"AMD0020")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {11}
- Memory32Fixed(ReadWrite, 0xFEDC8000, 0x2000)
+Device (FUR1) {
+ Name (_HID, "AMD0020")
+ Name (_UID, 0x1)
+ Name (_CRS, ResourceTemplate()
+ {
+ IRQ (Edge, ActiveHigh, Exclusive) { 11 }
+ Memory32Fixed (ReadWrite, 0xFEDC8000, 0x2000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(I2CA) {
- Name(_HID,"AMD0010")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {3}
- Memory32Fixed(ReadWrite, 0xFEDC2000, 0x1000)
+Device (I2CA) {
+ Name (_HID, "AMD0010")
+ Name (_UID, 0x0)
+ Name (_CRS, ResourceTemplate()
+ {
+ IRQ (Edge, ActiveHigh, Exclusive) { 3 }
+ Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(I2CB)
+Device (I2CB)
{
- Name(_HID,"AMD0010")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {15}
- Memory32Fixed(ReadWrite, 0xFEDC3000, 0x1000)
+ Name (_HID, "AMD0010")
+ Name (_UID, 0x1)
+ Name (_CRS, ResourceTemplate()
+ {
+ IRQ (Edge, ActiveHigh, Exclusive) { 15 }
+ Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(I2CC) {
- Name(_HID,"AMD0010")
- Name(_UID,0x0)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {6}
- Memory32Fixed(ReadWrite, 0xFEDC4000, 0x1000)
+Device (I2CC) {
+ Name (_HID, "AMD0010")
+ Name (_UID, 0x0)
+ Name (_CRS, ResourceTemplate()
+ {
+ IRQ (Edge, ActiveHigh, Exclusive) { 6 }
+ Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
-Device(I2CD)
+Device (I2CD)
{
- Name(_HID,"AMD0010")
- Name(_UID,0x1)
- Name(_CRS, ResourceTemplate() {
- IRQ(Edge, ActiveHigh, Exclusive) {14}
+ Name (_HID, "AMD0010")
+ Name (_UID, 0x1)
+ Name (_CRS, ResourceTemplate() {
+ IRQ (Edge, ActiveHigh, Exclusive) { 14 }
Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000)
})
- Method (_STA, 0x0, NotSerialized) {
+ Method (_STA, 0x0, NotSerialized)
+ {
Return (0x0F)
}
}
diff --git a/src/mainboard/google/kahlee/acpi/gpe.asl b/src/mainboard/google/kahlee/acpi/gpe.asl
index 9a84698..eed4e81 100644
--- a/src/mainboard/google/kahlee/acpi/gpe.asl
+++ b/src/mainboard/google/kahlee/acpi/gpe.asl
@@ -13,62 +13,70 @@
* GNU General Public License for more details.
*/
-Scope(\_GPE) { /* Start Scope GPE */
-
+Scope (\_GPE)
+{
/* General event 3 */
- Method(_L03) {
- /* DBGO("\\_GPE\\_L00\n") */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Method (_L03)
+ {
+ /* DBGO ("\\_GPE\\_L00\n") */
+ Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
/* Legacy PM event */
- Method(_L08) {
- /* DBGO("\\_GPE\\_L08\n") */
+ Method (_L08)
+ {
+ /* DBGO ("\\_GPE\\_L08\n") */
}
/* Temp warning (TWarn) event */
- Method(_L09) {
- /* DBGO("\\_GPE\\_L09\n") */
+ Method (_L09)
+ {
+ /* DBGO ("\\_GPE\\_L09\n") */
/* Notify (\_TZ.TZ00, 0x80) */
}
/* USB controller PME# */
- Method(_L0B) {
- /* DBGO("\\_GPE\\_L0B\n") */
- Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Method (_L0B)
+ {
+ /* DBGO ("\\_GPE\\_L0B\n") */
+ Notify (\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
/* ExtEvent0 SCI event */
- Method(_L10) {
- /* DBGO("\\_GPE\\_L10\n") */
+ Method (_L10)
+ {
+ /* DBGO ("\\_GPE\\_L10\n") */
}
/* ExtEvent1 SCI event */
- Method(_L11) {
- /* DBGO("\\_GPE\\_L11\n") */
+ Method (_L11)
+ {
+ /* DBGO ("\\_GPE\\_L11\n") */
}
/* GPIO0 or GEvent8 event */
- Method(_L18) {
- /* DBGO("\\_GPE\\_L18\n") */
- Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Method (_L18)
+ {
+ /* DBGO ("\\_GPE\\_L18\n") */
+ Notify (\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
/* Azalia SCI event */
- Method(_L1B) {
+ Method (_L1B)
+ {
/* DBGO("\\_GPE\\_L1B\n") */
- Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
+ Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
-} /* End Scope GPE */
+} /* End Scope GPE */
diff --git a/src/mainboard/google/kahlee/acpi/mainboard.asl b/src/mainboard/google/kahlee/acpi/mainboard.asl
index 508daa7..e98d26d 100644
--- a/src/mainboard/google/kahlee/acpi/mainboard.asl
+++ b/src/mainboard/google/kahlee/acpi/mainboard.asl
@@ -14,17 +14,23 @@
*/
/* Memory related values */
-Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0) /* Length of BIOS area */
+Name (LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
+Name (PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
+Name (PBLN, 0x0) /* Length of BIOS area */
-Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
-Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000) /* Base address of HPET table */
+/* Base address of PCIe config space */
+Name (PCBA, CONFIG_MMCONF_BASE_ADDRESS)
-Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+/* Length of PCIe config space, 1MB each bus */
+Name (PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER))
-/* Some global data */
-Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
-Name(OSV, Ones) /* Assume nothing */
-Name(PMOD, One) /* Assume APIC */
+/* Base address of HPET table */
+Name (HPBA, 0xFED00000)
+
+/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+Name (SSFG, 0x0D)
+
+/* Global Data */
+Name (OSVR, 3) /* WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
+Name (OSV, Ones) /* Assume nothing */
+Name (PMOD, One) /* Assume APIC */
diff --git a/src/mainboard/google/kahlee/acpi/routing.asl b/src/mainboard/google/kahlee/acpi/routing.asl
index 51cb612..c61bc4b 100644
--- a/src/mainboard/google/kahlee/acpi/routing.asl
+++ b/src/mainboard/google/kahlee/acpi/routing.asl
@@ -15,139 +15,148 @@
*/
/*
-DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
- )
- {
- #include "routing.asl"
- }
-*/
+ * DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
+ *{
+ * #include "routing.asl"
+ *}
+ */
/* Routing is in System Bus scope */
-Name(PR0, Package(){
+Name (PR0, Package()
+{
/* NB devices */
/* Bus 0, Dev 0 - F15 Host Controller */
/* Bus 0, Dev 1, Func 0 - PCI Bridge for Internal Graphics(IGP) */
/* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */
- Package(){0x0001FFFF, 0, INTB, 0 },
- Package(){0x0001FFFF, 1, INTC, 0 },
+ Package() { 0x0001FFFF, 0, INTB, 0 },
+ Package() { 0x0001FFFF, 1, INTC, 0 },
/* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */
- Package(){0x0002FFFF, 0, INTC, 0 },
- Package(){0x0002FFFF, 1, INTD, 0 },
- Package(){0x0002FFFF, 2, INTA, 0 },
- Package(){0x0002FFFF, 3, INTB, 0 },
+ Package() { 0x0002FFFF, 0, INTC, 0 },
+ Package() { 0x0002FFFF, 1, INTD, 0 },
+ Package() { 0x0002FFFF, 2, INTA, 0 },
+ Package() { 0x0002FFFF, 3, INTB, 0 },
/* FCH devices */
/* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, INTA, 0 },
- Package(){0x0014FFFF, 1, INTB, 0 },
- Package(){0x0014FFFF, 2, INTC, 0 },
- Package(){0x0014FFFF, 3, INTD, 0 },
+ Package() { 0x0014FFFF, 0, INTA, 0 },
+ Package() { 0x0014FFFF, 1, INTB, 0 },
+ Package() { 0x0014FFFF, 2, INTC, 0 },
+ Package() { 0x0014FFFF, 3, INTD, 0 },
/* Bus 0, Dev 18 Func 0 - USB: EHCI */
- Package(){0x0012FFFF, 0, INTC, 0 },
- Package(){0x0012FFFF, 1, INTB, 0 },
+ Package() { 0x0012FFFF, 0, INTC, 0 },
+ Package() { 0x0012FFFF, 1, INTB, 0 },
/* Bus 0, Dev 10 Func 0 - USB: xHCI */
- Package(){0x0010FFFF, 0, INTC, 0 },
- Package(){0x0010FFFF, 1, INTB, 0 },
+ Package() { 0x0010FFFF, 0, INTC, 0 },
+ Package() { 0x0010FFFF, 1, INTB, 0 },
/* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, INTD, 0 },
+ Package() { 0x0011FFFF, 0, INTD, 0 },
})
-Name(APR0, Package(){
+Name (APR0, Package()
+{
/* NB devices in APIC mode */
/* Bus 0, Dev 0 - F15 Host Controller */
/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
- Package(){0x0001FFFF, 0, 0, 43 },
- Package(){0x0001FFFF, 1, 0, 40 },
+ Package() { 0x0001FFFF, 0, 0, 43 },
+ Package() { 0x0001FFFF, 1, 0, 40 },
/* Bus 0, Dev 2 - PCIe Bridges */
- Package(){0x0002FFFF, 0, 0, 44 },
- Package(){0x0002FFFF, 1, 0, 45 },
- Package(){0x0002FFFF, 2, 0, 46 },
- Package(){0x0002FFFF, 3, 0, 47 },
+ Package() { 0x0002FFFF, 0, 0, 44 },
+ Package() { 0x0002FFFF, 1, 0, 45 },
+ Package() { 0x0002FFFF, 2, 0, 46 },
+ Package() { 0x0002FFFF, 3, 0, 47 },
/* SB devices in APIC mode */
/* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, 0, 16 },
- Package(){0x0014FFFF, 1, 0, 17 },
- Package(){0x0014FFFF, 2, 0, 18 },
- Package(){0x0014FFFF, 3, 0, 19 },
+ Package() { 0x0014FFFF, 0, 0, 16 },
+ Package() { 0x0014FFFF, 1, 0, 17 },
+ Package() { 0x0014FFFF, 2, 0, 18 },
+ Package() { 0x0014FFFF, 3, 0, 19 },
/* Bus 0, Dev 18 Func 0 - USB: EHCI */
- Package(){0x0012FFFF, 0, 0, 18 },
- Package(){0x0012FFFF, 1, 0, 17 },
+ Package() { 0x0012FFFF, 0, 0, 18 },
+ Package() { 0x0012FFFF, 1, 0, 17 },
/* Bus 0, Dev 10 Func 0 - USB: xHCI */
- Package(){0x0010FFFF, 0, 0, 18},
- Package(){0x0010FFFF, 1, 0, 17},
+ Package() { 0x0010FFFF, 0, 0, 18},
+ Package() { 0x0010FFFF, 1, 0, 17},
/* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, 0, 19 },
+ Package() { 0x0011FFFF, 0, 0, 19 },
})
/* GPP 0 */
-Name(PS4, Package(){
- Package(){0x0000FFFF, 0, INTA, 0 },
- Package(){0x0000FFFF, 1, INTB, 0 },
- Package(){0x0000FFFF, 2, INTC, 0 },
- Package(){0x0000FFFF, 3, INTD, 0 },
+Name (PS4, Package()
+{
+ Package() { 0x0000FFFF, 0, INTA, 0 },
+ Package() { 0x0000FFFF, 1, INTB, 0 },
+ Package() { 0x0000FFFF, 2, INTC, 0 },
+ Package() { 0x0000FFFF, 3, INTD, 0 },
})
-Name(APS4, Package(){
+Name (APS4, Package()
+{
/* PCIe slot - Hooked to PCIe slot 4 */
- Package(){0x0000FFFF, 0, 0, 24 },
- Package(){0x0000FFFF, 1, 0, 25 },
- Package(){0x0000FFFF, 2, 0, 26 },
- Package(){0x0000FFFF, 3, 0, 27 },
+ Package() { 0x0000FFFF, 0, 0, 24 },
+ Package() { 0x0000FFFF, 1, 0, 25 },
+ Package() { 0x0000FFFF, 2, 0, 26 },
+ Package() { 0x0000FFFF, 3, 0, 27 },
})
/* GPP 1 */
-Name(PS5, Package(){
- Package(){0x0000FFFF, 0, INTB, 0 },
- Package(){0x0000FFFF, 1, INTC, 0 },
- Package(){0x0000FFFF, 2, INTD, 0 },
- Package(){0x0000FFFF, 3, INTA, 0 },
+Name (PS5, Package()
+{
+ Package() { 0x0000FFFF, 0, INTB, 0 },
+ Package() { 0x0000FFFF, 1, INTC, 0 },
+ Package() { 0x0000FFFF, 2, INTD, 0 },
+ Package() { 0x0000FFFF, 3, INTA, 0 },
})
-Name(APS5, Package(){
- Package(){0x0000FFFF, 0, 0, 28 },
- Package(){0x0000FFFF, 1, 0, 29 },
- Package(){0x0000FFFF, 2, 0, 30 },
- Package(){0x0000FFFF, 3, 0, 31 },
+Name (APS5, Package()
+{
+ Package() { 0x0000FFFF, 0, 0, 28 },
+ Package() { 0x0000FFFF, 1, 0, 29 },
+ Package() { 0x0000FFFF, 2, 0, 30 },
+ Package() { 0x0000FFFF, 3, 0, 31 },
})
/* GPP 2 */
-Name(PS6, Package(){
- Package(){0x0000FFFF, 0, INTC, 0 },
- Package(){0x0000FFFF, 1, INTD, 0 },
- Package(){0x0000FFFF, 2, INTA, 0 },
- Package(){0x0000FFFF, 3, INTB, 0 },
+Name (PS6, Package()
+{
+ Package() { 0x0000FFFF, 0, INTC, 0 },
+ Package() { 0x0000FFFF, 1, INTD, 0 },
+ Package() { 0x0000FFFF, 2, INTA, 0 },
+ Package() { 0x0000FFFF, 3, INTB, 0 },
})
-Name(APS6, Package(){
- Package(){0x0000FFFF, 0, 0, 32 },
- Package(){0x0000FFFF, 1, 0, 33 },
- Package(){0x0000FFFF, 2, 0, 34 },
- Package(){0x0000FFFF, 3, 0, 35 },
+Name (APS6, Package()
+{
+ Package() { 0x0000FFFF, 0, 0, 32 },
+ Package() { 0x0000FFFF, 1, 0, 33 },
+ Package() { 0x0000FFFF, 2, 0, 34 },
+ Package() { 0x0000FFFF, 3, 0, 35 },
})
/* GPP 3 */
-Name(PS7, Package(){
- Package(){0x0000FFFF, 0, INTD, 0 },
- Package(){0x0000FFFF, 1, INTA, 0 },
- Package(){0x0000FFFF, 2, INTB, 0 },
- Package(){0x0000FFFF, 3, INTC, 0 },
+Name (PS7, Package()
+{
+ Package() { 0x0000FFFF, 0, INTD, 0 },
+ Package() { 0x0000FFFF, 1, INTA, 0 },
+ Package() { 0x0000FFFF, 2, INTB, 0 },
+ Package() { 0x0000FFFF, 3, INTC, 0 },
})
-Name(APS7, Package(){
- Package(){0x0000FFFF, 0, 0, 36 },
- Package(){0x0000FFFF, 1, 0, 37 },
- Package(){0x0000FFFF, 2, 0, 38 },
- Package(){0x0000FFFF, 3, 0, 39 },
+Name (APS7, Package()
+{
+ Package() { 0x0000FFFF, 0, 0, 36 },
+ Package() { 0x0000FFFF, 1, 0, 37 },
+ Package() { 0x0000FFFF, 2, 0, 38 },
+ Package() { 0x0000FFFF, 3, 0, 39 },
})
/* GPP 4 */
@@ -157,9 +166,10 @@
Package(){0x0000FFFF, 2, INTC, 0 },
Package(){0x0000FFFF, 3, INTD, 0 },
})
-Name(APS8, Package(){
- Package(){0x0000FFFF, 0, 0, 40 },
- Package(){0x0000FFFF, 1, 0, 41 },
- Package(){0x0000FFFF, 2, 0, 42 },
- Package(){0x0000FFFF, 3, 0, 43 },
+Name (APS8, Package()
+{
+ Package() { 0x0000FFFF, 0, 0, 40 },
+ Package() { 0x0000FFFF, 1, 0, 41 },
+ Package() { 0x0000FFFF, 2, 0, 42 },
+ Package() { 0x0000FFFF, 3, 0, 43 },
})
diff --git a/src/mainboard/google/kahlee/acpi/sleep.asl b/src/mainboard/google/kahlee/acpi/sleep.asl
index 58f0752..1e3a617 100644
--- a/src/mainboard/google/kahlee/acpi/sleep.asl
+++ b/src/mainboard/google/kahlee/acpi/sleep.asl
@@ -14,7 +14,7 @@
*/
/* Wake status package */
-Name(WKST,Package(){Zero, Zero})
+Name (WKST, Package() { Zero, Zero })
/*
* \_PTS - Prepare to Sleep method
@@ -32,55 +32,58 @@
* the ACPI driver. This method cannot modify the configuration or power
* state of any device in the system.
*/
-Method(_PTS, 1) {
- /* DBGO("\\_PTS\n") */
- /* DBGO("From S0 to S") */
- /* DBGO(Arg0) */
- /* DBGO("\n") */
+Method (_PTS, 1)
+{
+ /* DBGO ("\\_PTS\n") */
+ /* DBGO ("From S0 to S") */
+ /* DBGO (Arg0) */
+ /* DBGO ("\n") */
/* Clear wake status structure. */
- Store(0, PEWD)
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
-} /* End Method(\_PTS) */
-
-/*
-* \_BFS OEM Back From Sleep method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2
-*
-* Exit:
-* -none-
-*/
-Method(\_BFS, 1) {
- /* DBGO("\\_BFS\n") */
- /* DBGO("From S") */
- /* DBGO(Arg0) */
- /* DBGO(" to S0\n") */
+ Store (0, PEWD)
+ Store (0, Index(WKST,0))
+ Store (0, Index(WKST,1))
+ Store (7, UPWS)
}
/*
-* \_WAK System Wake method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2
-*
-* Exit:
-* Return package of 2 DWords
-* Dword 1 - Status
-* 0x00000000 wake succeeded
-* 0x00000001 Wake was signaled but failed due to lack of power
-* 0x00000002 Wake was signaled but failed due to thermal condition
-* Dword 2 - Power Supply state
-* if non-zero the effective S-state the power supply entered
-*/
-Method(\_WAK, 1) {
- /* DBGO("\\_WAK\n") */
- /* DBGO("From S") */
- /* DBGO(Arg0) */
- /* DBGO(" to S0\n") */
+ * \_BFS OEM Back From Sleep method
+ *
+ * Entry:
+ * Arg0=The value of the sleeping state S1=1, S2=2
+ *
+ * Exit:
+ * -none-
+ */
+Method (\_BFS, 1)
+{
+ /* DBGO ("\\_BFS\n") */
+ /* DBGO ("From S") */
+ /* DBGO (Arg0) */
+ /* DBGO (" to S0\n") */
+}
- Return(WKST)
-} /* End Method(\_WAK) */
+/*
+ * \_WAK System Wake method
+ *
+ * Entry:
+ * Arg0=The value of the sleeping state S1=1, S2=2
+ *
+ * Exit:
+ * Return package of 2 DWords
+ * Dword 1 - Status
+ * 0x00000000 wake succeeded
+ * 0x00000001 Wake was signaled but failed due to lack of power
+ * 0x00000002 Wake was signaled but failed due to thermal condition
+ * Dword 2 - Power Supply state
+ * if non-zero the effective S-state the power supply entered
+ */
+Method (\_WAK, 1)
+{
+ /* DBGO ("\\_WAK\n") */
+ /* DBGO ("From S") */
+ /* DBGO (Arg0) */
+ /* DBGO (" to S0\n") */
+
+ Return (WKST)
+}
diff --git a/src/mainboard/google/kahlee/acpi/usb_oc.asl b/src/mainboard/google/kahlee/acpi/usb_oc.asl
index 6a571a4..068d6fd 100644
--- a/src/mainboard/google/kahlee/acpi/usb_oc.asl
+++ b/src/mainboard/google/kahlee/acpi/usb_oc.asl
@@ -16,23 +16,22 @@
/* simple name description */
/*
-DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
- )
- {
- #include "usb.asl"
- }
-*/
+ * DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
+ * {
+ * #include "usb.asl"
+ * }
+ */
/* USB overcurrent mapping pins. */
-Name(UOM0, 0)
-Name(UOM1, 2)
-Name(UOM2, 0)
-Name(UOM3, 7)
-Name(UOM4, 2)
-Name(UOM5, 2)
-Name(UOM6, 6)
-Name(UOM7, 2)
-Name(UOM8, 6)
-Name(UOM9, 6)
+Name (UOM0, 0)
+Name (UOM1, 2)
+Name (UOM2, 0)
+Name (UOM3, 7)
+Name (UOM4, 2)
+Name (UOM5, 2)
+Name (UOM6, 6)
+Name (UOM7, 2)
+Name (UOM8, 6)
+Name (UOM9, 6)
/* USB Overcurrent GPEs */
--
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I61689cb55dc26cbad160d45aa0a36c00b386fe0c
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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