[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/gpio: Port gpio code from Apollolake ...

[Hannah Williams (Code Review)]

Hannah Williams has posted comments on this change. ( https://review.coreboot.org/19759 )

Change subject: soc/intel/common/block/gpio: Port gpio code from Apollolake into common gpio
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Patch Set 8:

(2 comments)

https://review.coreboot.org/#/c/19759/8/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
File src/soc/intel/common/block/include/intelblocks/gpio_defs.h:

PS8, Line 162: PAD_CFG_NF_IOS
> What's this about?
I need to go to mainboard gpio table and replace all instances of PAD_CFG_NF_IOS with PAD_CFG_NF_IOSSTATE_IOSTERM - will do


PS8, Line 178:  PAD_CFG_NF_IOS_3
> Why is there IOS_1, IOS_2, and IOS_3? When instantiating those they don't h
these are for a specific IOStandby State and Term combination. I can use the generic PAD_CFG_NF_IOSSTATE_IOSTERM and abandon these or else can name them as PAD_CFG_NF_IOSTATE_HIZCRX1_IOSTERM_DISPUPD instead of PAD_CFG_NF_IOS_1 - which one would be better ?


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Gerrit-Change-Id: Ic48401e92103ff0ec278fb69a3d304148a2d79aa
Gerrit-PatchSet: 8
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