[coreboot-gerrit] Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19820 )

Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
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Patch Set 1:

(5 comments)

Change looks good, just pci_def.h macros that could be used a bit more.

https://review.coreboot.org/#/c/19820/1/src/mainboard/asus/kgpe-d16/romstage.c
File src/mainboard/asus/kgpe-d16/romstage.c:

PS1, Line 92: 	uint32_t base_memory = 0xfc000000;
            : 	uint32_t memory_limit = 0xfc800000;
Use macros?


PS1, Line 101: 0x01
#define TEMP_PCI_BUS 0x1


PS1, Line 101: 0x19
PCI_SECUNDARY_BUS


PS1, Line 102: 0x1a
PCI_SUBORDINATE_BUS


PS1, Line 103: 0x20
PCI_BASE_ADDRESS_4


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Gerrit-MessageType: comment
Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Timothy Pearson <tpearson at raptorengineering.com>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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