[coreboot-gerrit] Change in coreboot[master]: Consolidate reset API, add generic reset_prepare mechanism

[Julius Werner (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/19789

to look at the new patch set (#2).

Change subject: Consolidate reset API, add generic reset_prepare mechanism
......................................................................

Consolidate reset API, add generic reset_prepare mechanism

There are many good reasons why we may want to run some sort of generic
callback before we're executing a reset. Unfortunateley, that is really
hard right now: code that wants to reset simply calls the hard_reset()
function (or one of its ill-differentiated cousins) which is directly
implemented by a myriad of different mainboards, northbridges, SoCs,
etc. More recent x86 SoCs have tried to solve the problem in their own
little corner of soc/intel/common, but it's really something that would
benefit all of coreboot.

This patch expands the concept onto all boards: hard_reset() and friends
get implemented in a generic location where they can run hooks before
calling the platform-specific implementation that is now called
do_hard_reset(). The existing Intel reset_prepare() gets generalized as
soc_reset_prepare() (and other hooks for arch, mainboard, etc. can now
easily be added later if necessary). We will also use this central point
to ensure all platforms flush their cache before reset, which is
generally useful for all cases where we're trying to persist information
in RAM across reboots (like the new persistent CBMEM console does).

Change-Id: I41b89ce4a923102f0748922496e1dd9bce8a610f
Signed-off-by: Julius Werner <jwerner at chromium.org>
---
M src/include/reset.h
M src/lib/Makefile.inc
A src/lib/reset.c
M src/mainboard/asus/a8v-e_deluxe/romstage.c
M src/mainboard/asus/a8v-e_se/romstage.c
M src/mainboard/asus/k8v-x/romstage.c
M src/mainboard/asus/m2v-mx_se/romstage.c
M src/mainboard/asus/m2v/romstage.c
M src/mainboard/google/cosmos/reset.c
M src/mainboard/google/foster/reset.c
M src/mainboard/google/gale/reset.c
M src/mainboard/google/gru/reset.c
M src/mainboard/google/nyan/reset.c
M src/mainboard/google/nyan_big/reset.c
M src/mainboard/google/nyan_blaze/reset.c
M src/mainboard/google/purin/reset.c
M src/mainboard/google/rotor/reset.c
M src/mainboard/google/smaug/reset.c
M src/mainboard/google/storm/reset.c
M src/mainboard/google/veyron/reset.c
M src/mainboard/google/veyron_mickey/reset.c
M src/mainboard/google/veyron_rialto/reset.c
M src/northbridge/via/cx700/reset.c
M src/northbridge/via/vx900/northbridge.c
M src/soc/dmp/vortex86ex/hard_reset.c
M src/soc/imgtec/pistachio/reset.c
M src/soc/intel/apollolake/reset.c
M src/soc/intel/baytrail/reset.c
M src/soc/intel/broadwell/reset.c
M src/soc/intel/common/reset.c
M src/soc/intel/fsp_baytrail/reset.c
M src/soc/intel/fsp_broadwell_de/reset.c
M src/soc/intel/sch/reset.c
M src/soc/intel/skylake/reset.c
M src/soc/mediatek/mt8173/wdt.c
M src/soc/samsung/exynos5250/power.c
M src/southbridge/amd/agesa/hudson/reset.c
M src/southbridge/amd/amd8111/early_ctrl.c
M src/southbridge/amd/amd8111/reset.c
M src/southbridge/amd/cimx/sb700/reset.c
M src/southbridge/amd/cimx/sb800/reset.c
M src/southbridge/amd/cimx/sb900/reset.c
M src/southbridge/amd/pi/hudson/reset.c
M src/southbridge/amd/sb600/early_setup.c
M src/southbridge/amd/sb600/reset.c
M src/southbridge/amd/sb700/reset.c
M src/southbridge/amd/sb800/early_setup.c
M src/southbridge/amd/sb800/reset.c
M src/southbridge/broadcom/bcm5785/early_setup.c
M src/southbridge/broadcom/bcm5785/reset.c
M src/southbridge/intel/bd82x6x/reset.c
M src/southbridge/intel/fsp_bd82x6x/reset.c
M src/southbridge/intel/fsp_i89xx/reset.c
M src/southbridge/intel/fsp_rangeley/reset.c
M src/southbridge/intel/i3100/reset.c
M src/southbridge/intel/i82801ax/reset.c
M src/southbridge/intel/i82801bx/reset.c
M src/southbridge/intel/i82801dx/reset.c
M src/southbridge/intel/i82801ex/reset.c
M src/southbridge/intel/i82801gx/reset.c
M src/southbridge/intel/lynxpoint/reset.c
M src/southbridge/nvidia/ck804/early_setup.c
M src/southbridge/nvidia/ck804/early_setup_car.c
M src/southbridge/nvidia/ck804/reset.c
M src/southbridge/nvidia/mcp55/early_ctrl.c
M src/southbridge/nvidia/mcp55/reset.c
M src/southbridge/sis/sis966/early_ctrl.c
M src/southbridge/sis/sis966/reset.c
68 files changed, 199 insertions(+), 142 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/19789/2
-- 
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I41b89ce4a923102f0748922496e1dd9bce8a610f
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>