[coreboot-gerrit] Change in coreboot[master]: soc/samsung/exynos5420: Move spi driver to use spi_bus_map

Furquan Shaikh (Code Review) gerrit at coreboot.org
Fri May 19 01:03:30 CEST 2017


Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19777 )

Change subject: soc/samsung/exynos5420: Move spi driver to use spi_bus_map
......................................................................

soc/samsung/exynos5420: Move spi driver to use spi_bus_map

This is in preparation to get rid of the strong spi_setup_slave
implemented by different platforms.

BUG=b:38430839

Change-Id: Ic937cbf93b87f5e43f7d70140b47fa97bcd7757e
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/soc/samsung/exynos5420/spi.c
1 file changed, 20 insertions(+), 13 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/19777/1

diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c
index c2a5828..fa53c0f 100644
--- a/src/soc/samsung/exynos5420/spi.c
+++ b/src/soc/samsung/exynos5420/spi.c
@@ -208,21 +208,10 @@
 	setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);
 }
 
-static const struct spi_ctrlr spi_ctrlr = {
-	.claim_bus = spi_ctrlr_claim_bus,
-	.release_bus = spi_ctrlr_release_bus,
-	.xfer = spi_ctrlr_xfer,
-	.max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE,
-};
-
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+static int spi_ctrlr_setup(const struct spi_slave *slave)
 {
-	ASSERT(bus >= 0 && bus < 3);
+	ASSERT(slave->bus >= 0 && slave->bus < 3);
 	struct exynos_spi_slave *eslave;
-
-	slave->bus = bus;
-	slave->cs = cs;
-	slave->ctrlr = &spi_ctrlr;
 
 	eslave = to_exynos_spi(slave);
 	if (!eslave->initialized) {
@@ -232,6 +221,24 @@
 	return 0;
 }
 
+static const struct spi_ctrlr spi_ctrlr = {
+	.setup = spi_ctrlr_setup,
+	.claim_bus = spi_ctrlr_claim_bus,
+	.release_bus = spi_ctrlr_release_bus,
+	.xfer = spi_ctrlr_xfer,
+	.max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE,
+};
+
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+	{
+		.ctrlr = &spi_ctrlr,
+		.bus_start = 0,
+		.bus_end = 2,
+	},
+};
+
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
+
 static int exynos_spi_read(struct spi_slave *slave, void *dest, uint32_t len,
 			   uint32_t off)
 {

-- 
To view, visit https://review.coreboot.org/19777
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic937cbf93b87f5e43f7d70140b47fa97bcd7757e
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>



More information about the coreboot-gerrit mailing list