[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8173: Move spi driver to use spi_bus_map

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19770 )

Change subject: soc/mediatek/mt8173: Move spi driver to use spi_bus_map
......................................................................

soc/mediatek/mt8173: Move spi driver to use spi_bus_map

This is in preparation to get rid of the strong spi_setup_slave
implemented by different platforms.

BUG=b:38430839

Change-Id: Ib0d6e4e8185ce1285b671af5ebcead1d42e049bc
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/soc/mediatek/mt8173/spi.c
1 file changed, 41 insertions(+), 22 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/19770/1

diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c
index b8ee423..fbbdf14 100644
--- a/src/soc/mediatek/mt8173/spi.c
+++ b/src/soc/mediatek/mt8173/spi.c
@@ -289,7 +289,26 @@
 	mtk_slave->state = MTK_SPI_IDLE;
 }
 
-static const struct spi_ctrlr spi_ctrlr = {
+static int spi_ctrlr_setup(const struct spi_slave *slave)
+{
+	struct mtk_spi_bus *eslave;
+
+	switch (slave->bus) {
+	case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
+		eslave = to_mtk_spi(slave);
+		assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
+		spi_sw_reset(eslave->regs);
+		return 0;
+	case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
+		return 0;
+	default:
+		die ("wrong bus number.\n");
+	};
+	return -1;
+}
+
+static const struct spi_ctrlr spi_flash_ctrlr = {
+	.setup = spi_ctrlr_setup,
 	.claim_bus = spi_ctrlr_claim_bus,
 	.release_bus = spi_ctrlr_release_bus,
 	.xfer = spi_ctrlr_xfer,
@@ -298,26 +317,26 @@
 	.flash_probe = mtk_spi_flash_probe,
 };
 
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
-	struct mtk_spi_bus *eslave;
+static const struct spi_ctrlr spi_ec_ctrlr = {
+	.setup = spi_ctrlr_setup,
+	.claim_bus = spi_ctrlr_claim_bus,
+	.release_bus = spi_ctrlr_release_bus,
+	.xfer = spi_ctrlr_xfer,
+	.xfer_vector = spi_xfer_two_vectors,
+	.max_xfer_size = 65535,
+};
 
-	slave->ctrlr = &spi_ctrlr;
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+	{
+		.ctrlr = &spi_ec_ctrlr,
+		.bus_start = CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
+		.bus_end = CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
+	},
+	{
+		.ctrlr = &spi_flash_ctrlr,
+		.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+		.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+	},
+};
 
-	switch (bus) {
-	case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
-		slave->bus = bus;
-		slave->cs = cs;
-		eslave = to_mtk_spi(slave);
-		assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
-		spi_sw_reset(eslave->regs);
-		return 0;
-	case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
-		slave->bus = bus;
-		slave->cs = cs;
-		return 0;
-	default:
-		die ("wrong bus number.\n");
-	};
-	return -1;
-}
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib0d6e4e8185ce1285b671af5ebcead1d42e049bc
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>