[coreboot-gerrit] Change in coreboot[master]: WIP inteltool: Add dumping of full PCR ports
Youness Alaoui (Code Review)
gerrit at coreboot.org
Thu May 18 19:34:41 CEST 2017
Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/19593 )
Change subject: WIP inteltool: Add dumping of full PCR ports
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Patch Set 1:
Note: When booting from coreboot, the entire PCR memory space is unreadable (returns 0xff everywhere). We need to enable bit 1 (MSE) of the PCICMD config (offset 0x4) in the P2SB controller :
pci_write_long (p2sb, 0x04, pci_read_long(p2sb, 0x04) | 0x2);
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Gerrit-MessageType: comment
Gerrit-Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Youness Alaoui <snifikino at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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