[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Enable verstage support
Marshall Dawson (Code Review)
gerrit at coreboot.org
Thu May 18 01:43:41 CEST 2017
Marshall Dawson has uploaded a new change for review. ( https://review.coreboot.org/19756 )
Change subject: soc/amd/stoneyridge: Enable verstage support
......................................................................
soc/amd/stoneyridge: Enable verstage support
Add Kconfig selects for vboot and update the makefile to pick up
files to be used in verstage.
Change-Id: If5c439a330d687156006aec2ebaea18ff2c96b3e
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/cpu/x86/lapic/Makefile.inc
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
3 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/19756/1
diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc
index 1525521..2cd867d 100644
--- a/src/cpu/x86/lapic/Makefile.inc
+++ b/src/cpu/x86/lapic/Makefile.inc
@@ -2,6 +2,7 @@
ramstage-y += lapic_cpu_init.c
ramstage-y += secondary.S
bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
+verstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
bootblock-y += boot_cpu.c
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index acc4bc0..650ee03 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -38,6 +38,7 @@
select SPI_FLASH if HAVE_ACPI_RESUME
select TSC_SYNC_LFENCE
select UDELAY_LAPIC
+ select COLLECT_TIMESTAMPS
select SOC_AMD_PI
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK
@@ -46,6 +47,12 @@
select C_ENVIRONMENT_BOOTBLOCK
select BOOTBLOCK_CONSOLE
+config VBOOT
+ select AMDFW_OUTSIDE_CBFS
+ select VBOOT_SEPARATE_VERSTAGE
+ select VBOOT_STARTS_IN_BOOTBLOCK
+ select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT
+
config UDELAY_LAPIC_FIXED_FSB
int
default 200
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 031c19b..ff21f59 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -53,6 +53,9 @@
romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
romstage-y += memmap.c
+verstage-y += reset.c
+verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
+
ramstage-y += chip.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
--
To view, visit https://review.coreboot.org/19756
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Gerrit-MessageType: newchange
Gerrit-Change-Id: If5c439a330d687156006aec2ebaea18ff2c96b3e
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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