[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add Intel SATA common code support
Aamir Bohra (Code Review)
gerrit at coreboot.org
Wed May 17 20:09:33 CEST 2017
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19734 )
Change subject: soc/intel/common: Add Intel SATA common code support
......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/19734/1/src/soc/intel/common/block/sata/Makefile.inc
File src/soc/intel/common/block/sata/Makefile.inc:
Line 1: ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SATA) += sata.c
> This is not _PCIE
Done.Sorry to miss that.
https://review.coreboot.org/#/c/19734/1/src/soc/intel/common/block/sata/sata.c
File src/soc/intel/common/block/sata/sata.c:
PS1, Line 49: port_impl = read32(ahcibar + SATA_ABAR_PORT_IMPLEMENTED) & 0x07;
: /* Port enable */
> This doesn't have the bug fixes from: https://review.coreboot.org/19553
Ok.Done.Revised under PS#2
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Gerrit-MessageType: comment
Gerrit-Change-Id: I42ec0059f7e311a232c38fef6a2e050a3e2c0ad3
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
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