[coreboot-gerrit] Change in coreboot[master]: buildgcc: Update GCC and IASL

[Martin Roth (Code Review)]

Martin Roth has posted comments on this change. ( https://review.coreboot.org/19618 )

Change subject: buildgcc: Update GCC and IASL
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Patch Set 3:

> It throws warnings at me in src/soc/intel/skylake/, why doesn't
 > Jenkins see that?
Thanks for pointing this out.  It wasn't showing the warnings because jenkins wasn't fetching the right commit for the coreboot-toolchain.  In one of the last jenkins updates, there was an issue with the git plugin we were using, so we switched to a different plugin.  The coreboot-toolchain build didn't get updated correctly, so was building from some other commit - master, maybe.
You can see that in the build - The top patch should be this one, but is something different:  https://qa.coreboot.org/job/coreboot-toolchain/279/consoleText


+ git log --oneline
+ head
e411f8eb72 soc/intel/skylake: Enable MTRR check
1ea7cce8ae mainboard/intel/galileo: Add SD controller configuration

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Gerrit-MessageType: comment
Gerrit-Change-Id: I262fb421067f2e58d7f3905f86bea28bcec219b5
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Iru Cai <mytbk920423 at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-HasComments: No