[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: C-state interrupt response time

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19675 )

Change subject: soc/intel/skylake: C-state interrupt response time
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/19675/1/src/soc/intel/skylake/cpu.c
File src/soc/intel/skylake/cpu.c:

Line 372: 	/* C-state Interrupt Response Latency Control 1 */
> What is this one if _0 is C3? C4? C5?
its C3, i will call it out


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Gerrit-MessageType: comment
Gerrit-Change-Id: I4f47502e1c212118d7cc89d4de60a1854072964a
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
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Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
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Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
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