[coreboot-gerrit] Change in coreboot[master]: drivers/storage: Delay after SD SWITCH operations

Lee Leahy (Code Review) gerrit at coreboot.org
Fri May 12 18:20:10 CEST 2017


Lee Leahy has submitted this change and it was merged. ( https://review.coreboot.org/19671 )

Change subject: drivers/storage: Delay after SD SWITCH operations
......................................................................


drivers/storage: Delay after SD SWITCH operations

Delay for a while after the switch operations to let the card recover.

TEST=Build and run on Galileo Gen2

Change-Id: I938e227a142e43ed6afda80d56af90df0bae1b05
Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
Reviewed-on: https://review.coreboot.org/19671
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
---
M src/drivers/storage/sd.c
1 file changed, 13 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved



diff --git a/src/drivers/storage/sd.c b/src/drivers/storage/sd.c
index 18d2c0e..6f4887a 100644
--- a/src/drivers/storage/sd.c
+++ b/src/drivers/storage/sd.c
@@ -136,6 +136,7 @@
 
 int sd_change_freq(struct storage_media *media)
 {
+	int delay;
 	int err, timeout;
 	struct mmc_command cmd;
 	struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
@@ -225,11 +226,23 @@
 	if (!((ctrlr->caps & DRVR_CAP_HS52) && (ctrlr->caps & DRVR_CAP_HS)))
 		goto out;
 
+	/* Give the card time to recover afer the switch operation.  Wait for
+	 * 9 (>= 8) clock cycles receiving the switch status.
+	 */
+	delay = (9000000 + ctrlr->bus_hz - 1) / ctrlr->bus_hz;
+	udelay(delay);
+
+	/* Switch to high speed */
 	err = sd_switch(ctrlr, SD_SWITCH_SWITCH, 0, 1,
 			(uint8_t *)switch_status);
 	if (err)
 		return err;
 
+	/* Give the card time to perform the switch operation.  Wait for 9
+	 * (>= 8) clock cycles receiving the switch status.
+	 */
+	udelay(delay);
+
 	if ((ntohl(switch_status[4]) & 0x0f000000) == 0x01000000) {
 		media->caps |= DRVR_CAP_HS;
 		SET_TIMING(ctrlr, BUS_TIMING_SD_HS);

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: I938e227a142e43ed6afda80d56af90df0bae1b05
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>



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