[coreboot-gerrit] Change in coreboot[master]: superio/nuvoton: Make SuperIO config functions externally av...
Patrick Georgi (Code Review)
gerrit at coreboot.org
Thu May 11 16:40:59 CEST 2017
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/19626 )
Change subject: superio/nuvoton: Make SuperIO config functions externally available
......................................................................
superio/nuvoton: Make SuperIO config functions externally available
Change-Id: I05f768c67542770e65279a562c05225b84edca40
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19626
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Nico Huber <nico.h at gmx.de>
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
---
M src/superio/nuvoton/common/early_serial.c
M src/superio/nuvoton/common/nuvoton.h
2 files changed, 6 insertions(+), 4 deletions(-)
Approvals:
Philippe Mathieu-Daudé: Looks good to me, but someone else must approve
Paul Menzel: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Nico Huber: Looks good to me, approved
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
index d1958a0..380046f 100644
--- a/src/superio/nuvoton/common/early_serial.c
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -45,7 +45,7 @@
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
-static void pnp_enter_conf_state(pnp_devfn_t dev)
+void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
@@ -53,7 +53,7 @@
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
-static void pnp_exit_conf_state(pnp_devfn_t dev)
+void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
@@ -62,7 +62,7 @@
/* Bring up early serial debugging output before the RAM is initialized. */
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
{
- pnp_enter_conf_state(dev);
+ nuvoton_pnp_enter_conf_state(dev);
if (IS_ENABLED(CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A))
/* Route GPIO8 pin group to COM A */
pnp_write_config(dev, 0x2a, 0x40);
@@ -70,5 +70,5 @@
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
+ nuvoton_pnp_exit_conf_state(dev);
}
diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h
index 22f1127..614b039 100644
--- a/src/superio/nuvoton/common/nuvoton.h
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -21,6 +21,8 @@
#include <arch/io.h>
#include <stdint.h>
+void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
+void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev);
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */
--
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Gerrit-MessageType: merged
Gerrit-Change-Id: I05f768c67542770e65279a562c05225b84edca40
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Edward O'Callaghan <edward.ocallaghan at koparo.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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