[coreboot-gerrit] Change in coreboot[master]: amd/pi/hudson: Clean up makefile.inc

Marc Jones (Code Review) gerrit at coreboot.org
Tue May 9 18:55:56 CEST 2017


Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19640 )

Change subject: amd/pi/hudson: Clean up makefile.inc
......................................................................

amd/pi/hudson: Clean up makefile.inc

Sort makefile.inc into rom, ram, ver, smm stages and alphabetize.

Change-Id: Ic8c6ca2b57527fcc96c135cc801a098201bf0465
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/southbridge/amd/pi/hudson/Makefile.inc
1 file changed, 26 insertions(+), 25 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/19640/1

diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index f6d7305..4405958 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -28,36 +28,37 @@
 #
 #*****************************************************************************
 
-romstage-y += smbus.c smbus_spd.c
-ramstage-y += hudson.c
-ramstage-y += usb.c
-ramstage-y += lpc.c
-ramstage-y += sm.c
-ramstage-y += ide.c
-ramstage-y += sata.c
+romstage-y += early_setup.c
+romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+romstage-y += smbus.c
+romstage-y += smbus_spd.c
+romstage-$(CONFIG_HUDSON_UART) += uart.c
+
+verstage-y += early_setup.c
+verstage-y += reset.c
+verstage-$(CONFIG_HUDSON_UART) += uart.c
+
+ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
+ramstage-$(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) += gpio.c
 ramstage-y += hda.c
+ramstage-y += hudson.c
+ramstage-y += ide.c
+ramstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c
+ramstage-y += lpc.c
 ramstage-y += pci.c
 ramstage-y += pcie.c
-ramstage-y += sd.c
-ramstage-$(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) += gpio.c
-
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
-ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-romstage-y += early_setup.c
-ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
-romstage-y += imc.c
-ramstage-y += imc.c
-endif
+ramstage-y += sata.c
+ramstage-y += sd.c
+ramstage-y += sm.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
+ramstage-$(CONFIG_HUDSON_UART) += uart.c
+ramstage-y += usb.c
 
-ifeq ($(CONFIG_HUDSON_UART), y)
-romstage-y += uart.c
-ramstage-y += uart.c
-endif
-
-smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smi_util.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
 
 # ROMSIG At ROMBASE + 0x20000:
 # +-----------+---------------+----------------+------------+

-- 
To view, visit https://review.coreboot.org/19640
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic8c6ca2b57527fcc96c135cc801a098201bf0465
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>



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