[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Enable MTRR check

Philippe Mathieu-Daudé (Code Review) gerrit at coreboot.org
Sun May 7 06:20:14 CEST 2017


Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19609 )

Change subject: soc/intel/skylake: Enable MTRR check
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Patch Set 1: Code-Review+1

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Gerrit-MessageType: comment
Gerrit-Change-Id: I440405c58c470ffa338be386d84870635530a031
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-HasComments: No



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