[coreboot-gerrit] Change in coreboot[master]: google/scarlet: Enable innolux, p079zca MIPI panel

[Martin Roth (Code Review)]

Martin Roth has uploaded a new change for review. ( https://review.coreboot.org/19597 )

Change subject: google/scarlet: Enable innolux,p079zca MIPI panel
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google/scarlet: Enable innolux,p079zca MIPI panel

TEST=Boot from scarlet, and mipi panel work

Original-Signed-off-by: Nickey Yang <nickey.yang at rock-chips.com>
Original-Reviewed-on: https://review.coreboot.org/19476
Original-Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>

Change-Id: I059a47661aef97cb5954281fecacdba1f3dbf983
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/mainboard/google/gru/devicetree.scarlet.cb
1 file changed, 11 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/19597/1

diff --git a/src/mainboard/google/gru/devicetree.scarlet.cb b/src/mainboard/google/gru/devicetree.scarlet.cb
index 2c31654..e5a9b31 100644
--- a/src/mainboard/google/gru/devicetree.scarlet.cb
+++ b/src/mainboard/google/gru/devicetree.scarlet.cb
@@ -15,6 +15,16 @@
 
 chip soc/rockchip/rk3399
 	device cpu_cluster 0 on end
-	register "vop_mode" = "VOP_MODE_NONE"
+	register "vop_mode" = "VOP_MODE_MIPI"
 	register "framebuffer_bits_per_pixel" = "32"
+	register "panel_pixel_clock" = "56900"
+	register "panel_refresh" = "60"
+	register "panel_ha" = "768"
+	register "panel_hbl" = "120"
+	register "panel_hso" = "40"
+	register "panel_hspw" = "40"
+	register "panel_va" = "1024"
+	register "panel_vbl" = "44"
+	register "panel_vso" = "20"
+	register "panel_vspw" = "4"
 end

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I059a47661aef97cb5954281fecacdba1f3dbf983
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Martin Roth <martinroth at google.com>