[coreboot-gerrit] Change in coreboot[master]: drivers/spi: Re-factor spi_crop_chunk

[Furquan Shaikh (Code Review)]

Hello Kyösti Mälkki, Philippe Mathieu-Daudé, Paul Menzel, build bot (Jenkins), coreboot org,

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/19386

to look at the new patch set (#4).

Change subject: drivers/spi: Re-factor spi_crop_chunk
......................................................................

drivers/spi: Re-factor spi_crop_chunk

spi_crop_chunk is a property of the SPI controller since it depends
upon the maximum transfer size that is supported by the
controller. Also, it is possible to implement this within spi-generic
layer by obtaining following parameters from the controller:

1. max_xfer_size: Maximum transfer size supported by the controller
(Size of 0 indicates invalid size, and unlimited transfer size is
indicated by UINT32_MAX.)

2. deduct_cmd_len: Whether cmd_len needs to be deducted from the
max_xfer_size to determine max data size that can be
transferred. (This is used by the amd boards.)

Change-Id: I81c199413f879c664682088e93bfa3f91c6a46e5
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/drivers/spi/adesto.c
M src/drivers/spi/amic.c
M src/drivers/spi/atmel.c
M src/drivers/spi/eon.c
M src/drivers/spi/gigadevice.c
M src/drivers/spi/macronix.c
M src/drivers/spi/spansion.c
M src/drivers/spi/spi-generic.c
M src/drivers/spi/spiconsole.c
M src/drivers/spi/sst.c
M src/drivers/spi/stmicro.c
M src/drivers/spi/winbond.c
M src/include/spi-generic.h
M src/soc/broadcom/cygnus/spi.c
M src/soc/imgtec/pistachio/spi.c
M src/soc/intel/baytrail/spi.c
M src/soc/intel/braswell/spi.c
M src/soc/intel/broadwell/spi.c
M src/soc/intel/common/block/fast_spi/fast_spi_flash.c
M src/soc/intel/common/block/gspi/gspi.c
M src/soc/intel/fsp_baytrail/spi.c
M src/soc/intel/fsp_broadwell_de/spi.c
M src/soc/marvell/armada38x/spi.c
M src/soc/marvell/bg4cd/spi.c
M src/soc/mediatek/mt8173/flash_controller.c
M src/soc/mediatek/mt8173/spi.c
M src/soc/nvidia/tegra124/spi.c
M src/soc/nvidia/tegra210/spi.c
M src/soc/qualcomm/ipq40xx/spi.c
M src/soc/qualcomm/ipq806x/spi.c
M src/soc/rockchip/common/spi.c
M src/soc/samsung/exynos5420/spi.c
M src/southbridge/amd/agesa/hudson/spi.c
M src/southbridge/amd/cimx/sb800/spi.c
M src/southbridge/amd/sb700/spi.c
M src/southbridge/intel/common/spi.c
M src/southbridge/intel/fsp_rangeley/spi.c
37 files changed, 92 insertions(+), 119 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/19386/4
-- 
To view, visit https://review.coreboot.org/19386
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I81c199413f879c664682088e93bfa3f91c6a46e5
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki at gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Reviewer: coreboot org <coreboot.org at gmail.com>