[coreboot-gerrit] Change in coreboot[master]: rockchip: rk3399: enable DPLL SSC for DDR EMI test on bob

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19557 )

Change subject: rockchip: rk3399: enable DPLL SSC for DDR EMI test on bob
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Patch Set 3:

Build Successful 

https://qa.coreboot.org/job/coreboot-gerrit/53169/ : SUCCESS

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Gerrit-MessageType: comment
Gerrit-Change-Id: I75461d4235bcf55324e6664a1220754e770b4786
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Caesar Wang <wxt at rock-chips.com>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Philip Chen <philipchen at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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