[coreboot-gerrit] Change in coreboot[master]: rockchip: rk3399: enable DPLL SSC for DDR EMI test on bob

[Caesar Wang (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/19557

to look at the new patch set (#2).

Change subject: rockchip: rk3399: enable DPLL SSC for DDR EMI test on bob
......................................................................

rockchip: rk3399: enable DPLL SSC for DDR EMI test on bob

Spread Spectrum Modulator(SSMOD) is a fully-digital circuit used to
modulate the frequency of the Silicon Creations’ Fractional PLL in order
to reduce EMI.

We need to turn the DPLL spread spectrum feature on to
reduce the EMI noise for DDR on bob.

BRANCH=none
BUG=b:37262721
TEST=mem checks the register value on bob.
localhost / # mem r 0xff76004c
0x00000100
localhost / # mem r 0xff760050
0x00000860
TEST=Test with memtester/s2r on bob.

Change-Id: I75461d4235bcf55324e6664a1220754e770b4786
Signed-off-by: Xing Zheng <zhengxing at rock-chips.com>
Signed-off-by: Caesar Wang <wxt at rock-chips.com>
---
M src/soc/rockchip/rk3399/Kconfig
M src/soc/rockchip/rk3399/clock.c
2 files changed, 65 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/19557/2
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I75461d4235bcf55324e6664a1220754e770b4786
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Caesar Wang <wxt at rock-chips.com>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Philip Chen <philipchen at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>