[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add Intel common PCR support
Subrata Banik (Code Review)
gerrit at coreboot.org
Wed Mar 29 15:22:31 CEST 2017
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18669 )
Change subject: soc/intel/common/block: Add Intel common PCR support
......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/18669/4/src/soc/intel/common/block/pcr/pcr.c
File src/soc/intel/common/block/pcr/pcr.c:
PS4, Line 117: int pcr_write32(uint8_t pid, uint16_t offset, uint32_t indata)
: {
: return pch_pcr_write(pid, offset, sizeof(indata), indata);
: }
:
: int pcr_write16(uint8_t pid, uint16_t offset, uint16_t indata)
: {
: return pch_pcr_write(pid, offset, sizeof(indata), indata);
: }
:
: int pcr_write8(uint8_t pid, uint16_t offset, uint8_t indata)
: {
: return pch_pcr_write(pid, offset, sizeof(indata), indata);
: }
:
: /*
: * Write PCR register. (This is internal function)
: * It programs PCR register and size in 1/2/4 bytes.
: * The offset should not exceed 0xFFFF and must be aligned with size
: *
: * u8 defines as 8 bit Port ID that will be used when sending
: * transaction to sideband.
: */
: static int pcr_and_then_or(uint8_t pid, uint16_t offset, size_t size,
: uint32_t anddata, uint32_t ordata)
: {
: uint32_t data32;
:
: if (pch_pcr_read(pid, offset, size, &data32) != 0)
: return -1;
:
: data32 &= anddata;
: data32 |= ordata;
:
: return pch_pcr_write(pid, offset, size, data32);
: }
:
: int pcr_andthenor32(uint8_t pid, uint16_t offset, uint32_t anddata,
: uint32_t ordata)
: {
: return pcr_and_then_or(pid, offset, sizeof(anddata), anddata, ordata);
: }
:
: int pcr_andthenor16(uint8_t pid, uint16_t offset, uint16_t anddata,
: uint16_t ordata)
: {
: return pcr_and_then_or(pid, offset, sizeof(anddata), anddata, ordata);
: }
:
: int pcr_andthenor8(uint8_t pid, uint16_t offset, uint8_t anddata,
:
> i'm in a process to fix this as well
Done
--
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Gerrit-MessageType: comment
Gerrit-Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
Gerrit-HasComments: Yes
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