[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add Intel common PCR support

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18669 )

Change subject: soc/intel/common/block: Add Intel common PCR support
......................................................................


Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/18669/4/src/soc/intel/common/block/pcr/pcr.c
File src/soc/intel/common/block/pcr/pcr.c:

PS4, Line 117: int pcr_write32(u8 pid, u16 offset, u32 indata)
             : {
             : 	return pch_pcr_write(pid, offset, sizeof(indata), indata);
             : }
             : 
             : int pcr_write16(u8 pid, u16 offset, u16 indata)
             : {
             : 	return pch_pcr_write(pid, offset, sizeof(indata), indata);
             : }
             : 
             : int pcr_write8(u8 pid, u16 offset, u8 indata)
             : {
             : 	return pch_pcr_write(pid, offset, sizeof(indata), indata);
             : }
             : 
             : /*
             :  * Write PCR register. (This is internal function)
             :  * It programs  PCR register and size in 1/2/4 bytes.
             :  * The offset should not exceed 0xFFFF and must be aligned with size
             :  *
             :  * u8 defines as 8 bit Port ID that will be used when sending
             :  * transaction to sideband.
             :  */
             : static int pcr_and_then_or(u8 pid, u16 offset, size_t size, u32 anddata,
             : 		   u32 ordata)
             : {
             : 	u32 data32;
             : 
             : 	if (pch_pcr_read(pid, offset, size, &data32) != 0)
             : 		return -1;
             : 
             : 	data32 &= anddata;
             : 	data32 |= ordata;
             : 
             : 	return pch_pcr_write(pid, offset, size, data32);
             : }
             : 
             : int pcr_andthenor32(u8 pid, u16 offset, u32 anddata, u32 ordata)
             : {
             : 	return pcr_and_then_or(pid, offset, sizeof(u32), anddata, ordata);
             : }
             : 
             : int pcr_andthenor16(u8 pid, u16 offset, u16 anddata, u16 ordata)
             : {
             : 	return pcr_and_then_or(pid, offset, sizeof(u16), anddata, ordata);
             : }
             : 
             : int pcr_andthenor8(u8 pid, u16 offset, u8 anddata, u8 ordata)
             : {
             : 	return pcr_and_then_or(pid, offset, sizeof(u8), anddata, ordata);
             : }
i'm in a process to fix this as well


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Gerrit-MessageType: comment
Gerrit-Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
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Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
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