[coreboot-gerrit] Change in coreboot[master]: vboot: Select SoC-specific configuration for all Chrome OS b...

[Julius Werner (Code Review)]

Julius Werner has uploaded a new change for review. ( https://review.coreboot.org/19022 )

Change subject: vboot: Select SoC-specific configuration for all Chrome OS boards
......................................................................

vboot: Select SoC-specific configuration for all Chrome OS boards

Some Chrome OS boards previously didn't have a hardcoded vboot
configuration (e.g. STARTS_IN_BOOTBLOCK/_ROMSTAGE, SEPARATE_VERSTAGE,
etc.) selected from their SoC and mainboard Kconfig files, and instead
relied on the Chrome OS build system to pass in those options
separately. Since there is usually only one "best" vboot configuration
for a certain board and there is often board or SoC code specifically
written with that configuration in mind (e.g. memlayout), these options
should not be adjustable in menuconfig and instead always get selected
by board and SoC Makefiles (as opposed to some external build system).

Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104
Signed-off-by: Julius Werner <jwerner at chromium.org>
---
M src/northbridge/intel/haswell/Kconfig
M src/northbridge/intel/sandybridge/Kconfig
M src/soc/broadcom/cygnus/Kconfig
M src/soc/intel/baytrail/Kconfig
M src/soc/intel/braswell/Kconfig
M src/soc/intel/broadwell/Kconfig
M src/soc/qualcomm/ipq40xx/Kconfig
M src/soc/qualcomm/ipq806x/Kconfig
M src/soc/samsung/exynos5250/Kconfig
M src/soc/samsung/exynos5420/Kconfig
10 files changed, 34 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/19022/1

diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index e9a93ba..48a92b6 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -25,6 +25,9 @@
 
 if NORTHBRIDGE_INTEL_HASWELL
 
+config VBOOT
+	select VBOOT_STARTS_IN_ROMSTAGE
+
 config BOOTBLOCK_NORTHBRIDGE_INIT
 	string
 	default "northbridge/intel/haswell/bootblock.c"
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index c78b397..8b92077 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -32,6 +32,9 @@
 
 if NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE
 
+config VBOOT
+	select VBOOT_STARTS_IN_ROMSTAGE
+
 config USE_NATIVE_RAMINIT
 	bool "Use native raminit"
 	default y
diff --git a/src/soc/broadcom/cygnus/Kconfig b/src/soc/broadcom/cygnus/Kconfig
index 4610903..e5849f0 100644
--- a/src/soc/broadcom/cygnus/Kconfig
+++ b/src/soc/broadcom/cygnus/Kconfig
@@ -29,6 +29,7 @@
 if SOC_BROADCOM_CYGNUS
 
 config CHROMEOS
+	select VBOOT_STARTS_IN_BOOTBLOCK
 	select SEPARATE_VERSTAGE
 	select RETURN_FROM_VERSTAGE
 
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 2d07c99..752e10a 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -39,6 +39,9 @@
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_SPI_CONSOLE_SUPPORT
 
+config VBOOT
+	select VBOOT_STARTS_IN_ROMSTAGE
+
 config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/intel/baytrail/bootblock/bootblock.c"
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index ac4a2ae..61f41ed 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -46,6 +46,9 @@
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_SPI_CONSOLE_SUPPORT
 
+config VBOOT
+	select VBOOT_STARTS_IN_ROMSTAGE
+
 config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/intel/braswell/bootblock/bootblock.c"
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 0cbd9e4..34f515f 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -46,6 +46,9 @@
 	select HAVE_SPI_CONSOLE_SUPPORT
 	select CPU_INTEL_COMMON
 
+config VBOOT
+	select VBOOT_STARTS_IN_ROMSTAGE
+
 config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/intel/broadwell/bootblock/cpu.c"
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index 05f29e4..d0c1fbd 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -13,6 +13,7 @@
 if SOC_QC_IPQ40XX
 
 config CHROMEOS
+	select VBOOT_STARTS_IN_BOOTBLOCK
 	select RETURN_FROM_VERSTAGE
 	select SEPARATE_VERSTAGE
 	select VBOOT_VBNV_FLASH
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 32b61bc..13977e5 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -12,6 +12,7 @@
 if SOC_QC_IPQ806X
 
 config CHROMEOS
+	select VBOOT_STARTS_IN_BOOTBLOCK
 	select VBOOT_VBNV_FLASH
 	select SEPARATE_VERSTAGE
 	select RETURN_FROM_VERSTAGE
diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig
index 63b58e7..ad90dc2 100644
--- a/src/soc/samsung/exynos5250/Kconfig
+++ b/src/soc/samsung/exynos5250/Kconfig
@@ -10,3 +10,11 @@
 	select HAVE_HARD_RESET
 	bool
 	default n
+
+if CPU_SAMSUNG_EXYNOS5250
+
+config VBOOT
+	select VBOOT_STARTS_IN_BOOTBLOCK
+	select SEPARATE_VERSTAGE
+
+endif
diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig
index 02c71c0..fba54b8 100644
--- a/src/soc/samsung/exynos5420/Kconfig
+++ b/src/soc/samsung/exynos5420/Kconfig
@@ -9,3 +9,11 @@
 	select RELOCATABLE_MODULES
 	bool
 	default n
+
+if CPU_SAMSUNG_EXYNOS5420
+
+config VBOOT
+	select VBOOT_STARTS_IN_BOOTBLOCK
+	select SEPARATE_VERSTAGE
+
+endif

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Julius Werner <jwerner at chromium.org>