[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Code clean up to use intel/common/bloc...

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18567 )

Change subject: soc/intel/apollolake: Code clean up to use intel/common/block/systemagent
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Patch Set 19:

(3 comments)

https://review.coreboot.org/#/c/18567/19/src/soc/intel/apollolake/bootblock/bootblock.c
File src/soc/intel/apollolake/bootblock/bootblock.c:

Line 56: 	pci_write_config32(dev, PCI_BASE_ADDRESS_0, CONFIG_IOSF_BASE_ADDRESS);
> This is broken now. MMCONFIG needs to be configured before we do pci config
yes its a mistake, while testing i was using common bootblock patch which streamline all IP call between small core and big core IP. I will add bootblock_system_agent_init call here


https://review.coreboot.org/#/c/18567/11/src/soc/intel/apollolake/include/soc/iomap.h
File src/soc/intel/apollolake/include/soc/iomap.h:

Line 28: #define P_CR_CORE_DISABLE_MASK_0_0_0_MCHBAR	0x7168
> I don't understand what you're saying about Kconfig not being included.  Kc
As i have explained here PCIEX_SIZE and CONFIG_SA_PCIEX_LENGTH holding different value, one use actual size and other use bit fields, so, i don't think we can use SA_PCIEX_LENGTH to replace.


Line 28: #define P_CR_CORE_DISABLE_MASK_0_0_0_MCHBAR	0x7168
> I thought this was a Kconfig value?
Now i realize PCIEX_SIZE here as macro represents actual size of PCI_EX_BAR, and same been used to reserve memory for PCIEX using mmio_resource

But in common code, we have added SA_PCIEX_LENGTH Kconfig for pciex bar length bit field definition, we can't use the same here.


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Gerrit-MessageType: comment
Gerrit-Change-Id: I01a24e2d4f1c8c9ca113c128bb6b3eac23dc79ad
Gerrit-PatchSet: 19
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
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