[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Set sdcard cd host ownership

Venkateswarlu V Vinjamuri (Code Review) gerrit at coreboot.org
Thu Mar 23 02:49:01 CET 2017


Venkateswarlu V Vinjamuri has uploaded a new change for review. ( https://review.coreboot.org/18947 )

Change subject: soc/intel/apollolake: Set sdcard cd host ownership
......................................................................

soc/intel/apollolake: Set sdcard cd host ownership

Currently sdcard cd gpio is always owned by the host. Due
to this sdcard detection fails during inital boot process
and OS fails to boot from sdcard.

This implements change in ownership from acpi to host when
kernel starts booting.

CQ-DEPEND=448173
BUG=chrome-os-partner:63070
TEST=Check OS boot from sdcard.

Change-Id: I042a8762dc1f9cb73e6a24c1e7169c9746b2ee14
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/acpi/globalnvs.asl
M src/soc/intel/apollolake/acpi/gpiolib.asl
M src/soc/intel/apollolake/acpi/scs.asl
M src/soc/intel/apollolake/gpio.c
M src/soc/intel/apollolake/include/soc/gpio.h
M src/soc/intel/apollolake/include/soc/gpio_defs.h
M src/soc/intel/apollolake/include/soc/nvs.h
8 files changed, 60 insertions(+), 3 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/18947/1

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 7c3f313..9858d85 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -185,9 +185,11 @@
 	if (cfg->prt0_gpio != GPIO_PRT0_UDEF)
 		gnvs->prt0 = (uintptr_t)gpio_dwx_address(cfg->prt0_gpio);
 
-	/* Assign sdcard cd address if GPIO is defined in devicetree */
-	if (cfg->sdcard_cd_gpio)
+	/* Assign sdcard cd address and community if GPIO is defined in devicetree */
+	if (cfg->sdcard_cd_gpio) {
 		gnvs->scd0 = (uintptr_t)gpio_dwx_address(cfg->sdcard_cd_gpio);
+		gnvs->scdc = gpio_get_pad_community(cfg->sdcard_cd_gpio);
+	}
 }
 
 /* Save wake source information for calculating ACPI _SWS values */
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
index 86a1a23..433133b 100644
--- a/src/soc/intel/apollolake/acpi/globalnvs.asl
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -40,6 +40,7 @@
 	NHLL,	32,     // 0x21 - 0x24 - NHLT Length
 	PRT0,	32,     // 0x25 - 0x28 - PERST_0 Address
 	SCD0,	32,     // 0x29 - 0x2D - SD_CD Address
+	SCDC,   32,     // 0x2E - 0x32 - SD_CD GPIO community
 
 	/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
 	Offset (0x100),
diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl
index cec6d36..be09845 100644
--- a/src/soc/intel/apollolake/acpi/gpiolib.asl
+++ b/src/soc/intel/apollolake/acpi/gpiolib.asl
@@ -64,4 +64,28 @@
 		}
 		Store (Arg1, TEMP)
 	}
+	/* Get Host ownership of GPIO community */
+	Method (GHO, 0x1, Serialized)
+	{
+		/* Arg0 - GPIO Community */
+		OperationRegion (PDW1, SystemMemory, Or ( Or (CONFIG_IOSF_BASE_ADDRESS,
+				ShiftLeft(Arg0, 16)), 0x80), 4)
+		Field (PDW1, AnyAcc, NoLock, Preserve) {
+			TEMP, 32
+		}
+		Return (TEMP)
+	}
+
+	/* Set Host ownership of GPIO community */
+	Method (SHO, 0x2, Serialized)
+	{
+		/* Arg0 - GPIO Community */
+		/* Arg1 - Value for Host Own register */
+		OperationRegion (PDW0, SystemMemory, Or ( Or (CONFIG_IOSF_BASE_ADDRESS,
+				ShiftLeft(Arg0, 16)), 0x80), 4)
+		Field (PDW0, AnyAcc, NoLock, Preserve) {
+			TEMP,32
+		}
+		Store (Arg1, TEMP)
+	}
 }
diff --git a/src/soc/intel/apollolake/acpi/scs.asl b/src/soc/intel/apollolake/acpi/scs.asl
index f69f43c..d35d2ee 100644
--- a/src/soc/intel/apollolake/acpi/scs.asl
+++ b/src/soc/intel/apollolake/acpi/scs.asl
@@ -115,6 +115,19 @@
 	Device (SDCD)
 	{
 		Name (_ADR, 0x001B0000)
+		Name (_S0W, 3) /* _S0W: S0 Device Wake State */
+
+		/* Set the host ownership of sdcard cd during kernel boot */
+		Method (_INI, 0)
+		{
+			/* Check SDCard CD pin address is valid */
+			If (LNotEqual (SCD0, 0))
+			{
+				Store (\_SB.GHO (\SCDC), Local0)
+				Or (Local0, HOSTSW_OWN_REG_GPIO_177, Local0)
+				\_SB.SHO (\SCDC, Local0)
+			}
+		}
 
 		Method (_PS0, 0, NotSerialized)
 		{
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index 7be126e..7a6b1da 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -189,6 +189,16 @@
 	return iosf_address(comm->port, PAD_CFG_OFFSET(pad - comm->first_pad));
 }
 
+int gpio_get_pad_community(const uint16_t pad)
+{
+	/* Get the community of given pad
+	* pad - GPIO number
+	* returns - community of given pad
+	*/
+	const struct pad_community *comm = gpio_get_community(pad);
+	return comm->port;
+}
+
 void gpio_input_pulldown(gpio_t gpio)
 {
 	struct pad_config cfg = PAD_CFG_GPI(gpio, DN_20K, DEEP);
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index bdd3994..958d32e 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -162,6 +162,10 @@
 
 /* Calculate GPIO DW0 address */
 void *gpio_dwx_address(const uint16_t pad);
+
+/* Get the GPIO community of given pin */
+int gpio_get_pad_community(const uint16_t pad);
+
 /*
  * Set the GPIO groups for the GPE blocks. The values from PMC register GPE_CFG
  * are passed which is then mapped to proper groups for MISCCFG. This basically
diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h
index 2fdf10f..669b7bf 100644
--- a/src/soc/intel/apollolake/include/soc/gpio_defs.h
+++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h
@@ -52,6 +52,8 @@
  * GPIO 0 ~ 31, GPIO 32 ~ 63, GPIO 64 ~ 95
  */
 #define HOSTSW_OWN_REG_BASE		0x80
+/* Host ownership for gpio 177 */
+#define HOSTSW_OWN_REG_GPIO_177		(1 << 26)
 
 #define PAD_CFG0_TX_STATE		(1 << 0)
 #define PAD_CFG0_RX_STATE		(1 << 1)
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 21ac14e..c7fa5b9 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -40,7 +40,8 @@
 	uint32_t	nhll; /* 0x21 - 0x24 - NHLT Length */
 	uint32_t	prt0; /* 0x25 - 0x28 - PERST_0 Address */
 	uint32_t	scd0; /* 0x29 - 0x2D - SD_CD Address */
-	uint8_t		unused[211];
+	uint32_t	scdc; /* 0x2E - 0x32 - SD_CD GPIO community */
+	uint8_t		unused[207];
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t chromeos;

-- 
To view, visit https://review.coreboot.org/18947
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: I042a8762dc1f9cb73e6a24c1e7169c9746b2ee14
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>



More information about the coreboot-gerrit mailing list