[coreboot-gerrit] Change in coreboot[master]: Remove FSP 1.1 support

Wed Mar 22 05:18:04 CET 2017

Hello Kyösti Mälkki, Andrey Petrov, Aaron Durbin, Huang Jin, York Yang, Lee Leahy, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/18930

to look at the new patch set (#3).

Change subject: Remove FSP 1.1 support
......................................................................

Remove FSP 1.1 support

FSP 1.1 is poorly integrated in that it needs to pull in EFI headers,
with all the EFI type definitions. Intel realized this with FSP 2.0,
and provided scripts to allow for a proper integration.

Since most of the boards have been converted to FSP2.0, this removal
makes sense. There is insufficient interest in the boards that have
not been converted, so they can be safely dropped.

Change-Id: I55a4127ccff3fcc8e211437d5db767d94a6cf864
Signed-off-by: Adurb Akhbar <aakhbar at mail.com>
---
M src/commonlib/Makefile.inc
D src/drivers/intel/fsp1_1/Kconfig
D src/drivers/intel/fsp1_1/Makefile.inc
D src/drivers/intel/fsp1_1/after_raminit.S
D src/drivers/intel/fsp1_1/bootblock.c
D src/drivers/intel/fsp1_1/cache_as_ram.inc
D src/drivers/intel/fsp1_1/car.c
D src/drivers/intel/fsp1_1/fsp_gop.c
D src/drivers/intel/fsp1_1/fsp_relocate.c
D src/drivers/intel/fsp1_1/fsp_util.c
D src/drivers/intel/fsp1_1/hob.c
D src/drivers/intel/fsp1_1/include/fsp/api.h
D src/drivers/intel/fsp1_1/include/fsp/bootblock.h
D src/drivers/intel/fsp1_1/include/fsp/car.h
D src/drivers/intel/fsp1_1/include/fsp/gma.h
D src/drivers/intel/fsp1_1/include/fsp/gop.h
D src/drivers/intel/fsp1_1/include/fsp/memmap.h
D src/drivers/intel/fsp1_1/include/fsp/ramstage.h
D src/drivers/intel/fsp1_1/include/fsp/romstage.h
D src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
D src/drivers/intel/fsp1_1/include/fsp/stack.h
D src/drivers/intel/fsp1_1/include/fsp/uefi_binding.h
D src/drivers/intel/fsp1_1/include/fsp/util.h
D src/drivers/intel/fsp1_1/mma_core.c
D src/drivers/intel/fsp1_1/raminit.c
D src/drivers/intel/fsp1_1/ramstage.c
D src/drivers/intel/fsp1_1/romstage.c
D src/drivers/intel/fsp1_1/stack.c
D src/drivers/intel/fsp1_1/stage_cache.c
D src/drivers/intel/fsp1_1/vbt.c
D src/drivers/intel/fsp1_1/verstage.c
D src/mainboard/google/chell/Kconfig
D src/mainboard/google/chell/Kconfig.name
D src/mainboard/google/chell/Makefile.inc
D src/mainboard/google/chell/acpi/dptf.asl
D src/mainboard/google/chell/acpi/ec.asl
D src/mainboard/google/chell/acpi/mainboard.asl
D src/mainboard/google/chell/acpi/superio.asl
D src/mainboard/google/chell/acpi_tables.c
D src/mainboard/google/chell/board_info.txt
D src/mainboard/google/chell/boardid.c
D src/mainboard/google/chell/bootblock_mainboard.c
D src/mainboard/google/chell/chromeos.c
D src/mainboard/google/chell/chromeos.fmd
D src/mainboard/google/chell/cmos.layout
D src/mainboard/google/chell/devicetree.cb
D src/mainboard/google/chell/dsdt.asl
D src/mainboard/google/chell/ec.c
D src/mainboard/google/chell/ec.h
D src/mainboard/google/chell/gpio.h
D src/mainboard/google/chell/mainboard.c
D src/mainboard/google/chell/pei_data.c
D src/mainboard/google/chell/ramstage.c
D src/mainboard/google/chell/romstage.c
D src/mainboard/google/chell/smihandler.c
D src/mainboard/google/chell/spd/Makefile.inc
D src/mainboard/google/chell/spd/empty.spd.hex
D src/mainboard/google/chell/spd/hynix_dimm_H9CCNNN8GTMLAR.spd.hex
D src/mainboard/google/chell/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex
D src/mainboard/google/chell/spd/hynix_dimm_H9CCNNNCLTMLAR.spd.hex
D src/mainboard/google/chell/spd/samsung_dimm_K4E6E304EB-EGCF.spd.hex
D src/mainboard/google/chell/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
D src/mainboard/google/chell/spd/samsung_dimm_K4E8E304EE-EGCF.spd.hex
D src/mainboard/google/chell/spd/spd.c
D src/mainboard/google/chell/spd/spd.h
D src/mainboard/google/cyan/Kconfig
D src/mainboard/google/cyan/Kconfig.name
D src/mainboard/google/cyan/Makefile.inc
D src/mainboard/google/cyan/acpi/dptf.asl
D src/mainboard/google/cyan/acpi/ec.asl
D src/mainboard/google/cyan/acpi/mainboard.asl
D src/mainboard/google/cyan/acpi/superio.asl
D src/mainboard/google/cyan/acpi_tables.c
D src/mainboard/google/cyan/board_info.txt
D src/mainboard/google/cyan/boardid.c
D src/mainboard/google/cyan/chromeos.c
D src/mainboard/google/cyan/chromeos.fmd
D src/mainboard/google/cyan/cmos.layout
D src/mainboard/google/cyan/com_init.c
D src/mainboard/google/cyan/devicetree.cb
D src/mainboard/google/cyan/dsdt.asl
D src/mainboard/google/cyan/ec.c
D src/mainboard/google/cyan/ec.h
D src/mainboard/google/cyan/fadt.c
D src/mainboard/google/cyan/gpio.c
D src/mainboard/google/cyan/gpio.h
D src/mainboard/google/cyan/gpio_pre_evt.c
D src/mainboard/google/cyan/irqroute.c
D src/mainboard/google/cyan/irqroute.h
D src/mainboard/google/cyan/mainboard.c
D src/mainboard/google/cyan/onboard.h
D src/mainboard/google/cyan/ramstage.c
D src/mainboard/google/cyan/romstage.c
D src/mainboard/google/cyan/smihandler.c
D src/mainboard/google/cyan/spd/Makefile.inc
D src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
D src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
D src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
D src/mainboard/google/cyan/spd/spd.c
D src/mainboard/google/cyan/w25q64.c
D src/mainboard/google/glados/Kconfig
D src/mainboard/google/glados/Kconfig.name
D src/mainboard/google/glados/Makefile.inc
D src/mainboard/google/glados/acpi/dptf.asl
D src/mainboard/google/glados/acpi/ec.asl
D src/mainboard/google/glados/acpi/mainboard.asl
D src/mainboard/google/glados/acpi/superio.asl
D src/mainboard/google/glados/acpi_tables.c
D src/mainboard/google/glados/board_info.txt
D src/mainboard/google/glados/boardid.c
D src/mainboard/google/glados/bootblock_mainboard.c
D src/mainboard/google/glados/chromeos.c
D src/mainboard/google/glados/chromeos.fmd
D src/mainboard/google/glados/cmos.layout
D src/mainboard/google/glados/devicetree.cb
D src/mainboard/google/glados/dsdt.asl
D src/mainboard/google/glados/ec.c
D src/mainboard/google/glados/ec.h
D src/mainboard/google/glados/gpio.h
D src/mainboard/google/glados/mainboard.c
D src/mainboard/google/glados/pei_data.c
D src/mainboard/google/glados/ramstage.c
D src/mainboard/google/glados/romstage.c
D src/mainboard/google/glados/smihandler.c
D src/mainboard/google/glados/spd/Makefile.inc
D src/mainboard/google/glados/spd/empty.spd.hex
D src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex
D src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex
D src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
D src/mainboard/google/glados/spd/spd.c
D src/mainboard/google/glados/spd/spd.h
D src/mainboard/google/lars/Kconfig
D src/mainboard/google/lars/Kconfig.name
D src/mainboard/google/lars/Makefile.inc
D src/mainboard/google/lars/acpi/dptf.asl
D src/mainboard/google/lars/acpi/ec.asl
D src/mainboard/google/lars/acpi/mainboard.asl
D src/mainboard/google/lars/acpi/superio.asl
D src/mainboard/google/lars/acpi_tables.c
D src/mainboard/google/lars/board_info.txt
D src/mainboard/google/lars/boardid.c
D src/mainboard/google/lars/bootblock_mainboard.c
D src/mainboard/google/lars/chromeos.c
D src/mainboard/google/lars/chromeos.fmd
D src/mainboard/google/lars/cmos.layout
D src/mainboard/google/lars/devicetree.cb
D src/mainboard/google/lars/dsdt.asl
D src/mainboard/google/lars/ec.c
D src/mainboard/google/lars/ec.h
D src/mainboard/google/lars/gpio.h
D src/mainboard/google/lars/mainboard.c
D src/mainboard/google/lars/pei_data.c
D src/mainboard/google/lars/ramstage.c
D src/mainboard/google/lars/romstage.c
D src/mainboard/google/lars/smihandler.c
D src/mainboard/google/lars/spd/Makefile.inc
D src/mainboard/google/lars/spd/empty.spd.hex
D src/mainboard/google/lars/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
D src/mainboard/google/lars/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
D src/mainboard/google/lars/spd/samsung_dimm_K4E6E304EB-EGCF-2G-1866.spd.hex
D src/mainboard/google/lars/spd/samsung_dimm_K4E8E324EB-EGCF-1G-1866.spd.hex
D src/mainboard/google/lars/spd/spd.c
D src/mainboard/google/lars/spd/spd.h
M src/mainboard/intel/galileo/Kconfig
M src/mainboard/intel/galileo/Makefile.inc
M src/mainboard/intel/galileo/romstage.c
D src/mainboard/intel/kunimitsu/Kconfig
D src/mainboard/intel/kunimitsu/Kconfig.name
D src/mainboard/intel/kunimitsu/Makefile.inc
D src/mainboard/intel/kunimitsu/acpi/dptf.asl
D src/mainboard/intel/kunimitsu/acpi/ec.asl
D src/mainboard/intel/kunimitsu/acpi/mainboard.asl
D src/mainboard/intel/kunimitsu/acpi/superio.asl
D src/mainboard/intel/kunimitsu/acpi_tables.c
D src/mainboard/intel/kunimitsu/board_info.txt
D src/mainboard/intel/kunimitsu/boardid.c
D src/mainboard/intel/kunimitsu/bootblock_mainboard.c
D src/mainboard/intel/kunimitsu/chromeos.c
D src/mainboard/intel/kunimitsu/chromeos.fmd
D src/mainboard/intel/kunimitsu/cmos.layout
D src/mainboard/intel/kunimitsu/devicetree.cb
D src/mainboard/intel/kunimitsu/dsdt.asl
D src/mainboard/intel/kunimitsu/ec.c
D src/mainboard/intel/kunimitsu/ec.h
D src/mainboard/intel/kunimitsu/gpio.h
D src/mainboard/intel/kunimitsu/mainboard.c
D src/mainboard/intel/kunimitsu/pei_data.c
D src/mainboard/intel/kunimitsu/ramstage.c
D src/mainboard/intel/kunimitsu/romstage.c
D src/mainboard/intel/kunimitsu/romstage_fsp20.c
D src/mainboard/intel/kunimitsu/smihandler.c
D src/mainboard/intel/kunimitsu/spd/Makefile.inc
D src/mainboard/intel/kunimitsu/spd/empty.spd.hex
D src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/mic_dimm_EDF8132A3MA-JD-F-1G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
D src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex
D src/mainboard/intel/kunimitsu/spd/spd.c
D src/mainboard/intel/kunimitsu/spd/spd.h
D src/mainboard/intel/kunimitsu/spd/spd_util.c
D src/mainboard/intel/strago/Kconfig
D src/mainboard/intel/strago/Kconfig.name
D src/mainboard/intel/strago/Makefile.inc
D src/mainboard/intel/strago/acpi/dptf.asl
D src/mainboard/intel/strago/acpi/ec.asl
D src/mainboard/intel/strago/acpi/mainboard.asl
D src/mainboard/intel/strago/acpi/superio.asl
D src/mainboard/intel/strago/acpi_tables.c
D src/mainboard/intel/strago/board_info.txt
D src/mainboard/intel/strago/boardid.c
D src/mainboard/intel/strago/chromeos.c
D src/mainboard/intel/strago/chromeos.fmd
D src/mainboard/intel/strago/cmos.layout
D src/mainboard/intel/strago/com_init.c
D src/mainboard/intel/strago/devicetree.cb
D src/mainboard/intel/strago/dsdt.asl
D src/mainboard/intel/strago/ec.c
D src/mainboard/intel/strago/ec.h
D src/mainboard/intel/strago/fadt.c
D src/mainboard/intel/strago/gpio.c
D src/mainboard/intel/strago/irqroute.c
D src/mainboard/intel/strago/irqroute.h
D src/mainboard/intel/strago/mainboard.c
D src/mainboard/intel/strago/onboard.h
D src/mainboard/intel/strago/ramstage.c
D src/mainboard/intel/strago/romstage.c
D src/mainboard/intel/strago/smihandler.c
D src/mainboard/intel/strago/w25q64.c
D src/soc/intel/braswell/Kconfig
D src/soc/intel/braswell/Makefile.inc
D src/soc/intel/braswell/acpi.c
D src/soc/intel/braswell/acpi/cpu.asl
D src/soc/intel/braswell/acpi/device_nvs.asl
D src/soc/intel/braswell/acpi/dptf/charger.asl
D src/soc/intel/braswell/acpi/dptf/cpu.asl
D src/soc/intel/braswell/acpi/dptf/dptf.asl
D src/soc/intel/braswell/acpi/dptf/thermal.asl
D src/soc/intel/braswell/acpi/dptf/wifi.asl
D src/soc/intel/braswell/acpi/dptf/wwan.asl
D src/soc/intel/braswell/acpi/globalnvs.asl
D src/soc/intel/braswell/acpi/gpio.asl
D src/soc/intel/braswell/acpi/irq_helper.h
D src/soc/intel/braswell/acpi/irqlinks.asl
D src/soc/intel/braswell/acpi/irqroute.asl
D src/soc/intel/braswell/acpi/lpc.asl
D src/soc/intel/braswell/acpi/lpe.asl
D src/soc/intel/braswell/acpi/lpss.asl
D src/soc/intel/braswell/acpi/platform.asl
D src/soc/intel/braswell/acpi/scc.asl
D src/soc/intel/braswell/acpi/sleepstates.asl
D src/soc/intel/braswell/acpi/southcluster.asl
D src/soc/intel/braswell/acpi/xhci.asl
D src/soc/intel/braswell/bootblock/bootblock.c
D src/soc/intel/braswell/bootblock/timestamp.inc
D src/soc/intel/braswell/chip.c
D src/soc/intel/braswell/chip.h
D src/soc/intel/braswell/cpu.c
D src/soc/intel/braswell/elog.c
D src/soc/intel/braswell/emmc.c
D src/soc/intel/braswell/gfx.c
D src/soc/intel/braswell/gpio.c
D src/soc/intel/braswell/gpio_support.c
D src/soc/intel/braswell/hda.c
D src/soc/intel/braswell/include/soc/acpi.h
D src/soc/intel/braswell/include/soc/device_nvs.h
D src/soc/intel/braswell/include/soc/ehci.h
D src/soc/intel/braswell/include/soc/gfx.h
D src/soc/intel/braswell/include/soc/gpio.h
D src/soc/intel/braswell/include/soc/gpio_defs.h
D src/soc/intel/braswell/include/soc/hda.h
D src/soc/intel/braswell/include/soc/iomap.h
D src/soc/intel/braswell/include/soc/iosf.h
D src/soc/intel/braswell/include/soc/irq.h
D src/soc/intel/braswell/include/soc/lpc.h
D src/soc/intel/braswell/include/soc/msr.h
D src/soc/intel/braswell/include/soc/nvs.h
D src/soc/intel/braswell/include/soc/pattrs.h
D src/soc/intel/braswell/include/soc/pci_devs.h
D src/soc/intel/braswell/include/soc/pcie.h
D src/soc/intel/braswell/include/soc/pei_data.h
D src/soc/intel/braswell/include/soc/pei_wrapper.h
D src/soc/intel/braswell/include/soc/pm.h
D src/soc/intel/braswell/include/soc/ramstage.h
D src/soc/intel/braswell/include/soc/romstage.h
D src/soc/intel/braswell/include/soc/sata.h
D src/soc/intel/braswell/include/soc/smm.h
D src/soc/intel/braswell/include/soc/spi.h
D src/soc/intel/braswell/include/soc/xhci.h
D src/soc/intel/braswell/iosf.c
D src/soc/intel/braswell/lpc_init.c
D src/soc/intel/braswell/lpe.c
D src/soc/intel/braswell/lpss.c
D src/soc/intel/braswell/memmap.c
D src/soc/intel/braswell/northcluster.c
D src/soc/intel/braswell/pcie.c
D src/soc/intel/braswell/placeholders.c
D src/soc/intel/braswell/pmutil.c
D src/soc/intel/braswell/ramstage.c
D src/soc/intel/braswell/romstage/Makefile.inc
D src/soc/intel/braswell/romstage/early_spi.c
D src/soc/intel/braswell/romstage/pmc.c
D src/soc/intel/braswell/romstage/romstage.c
D src/soc/intel/braswell/sata.c
D src/soc/intel/braswell/scc.c
D src/soc/intel/braswell/sd.c
D src/soc/intel/braswell/smihandler.c
D src/soc/intel/braswell/smm.c
D src/soc/intel/braswell/southcluster.c
D src/soc/intel/braswell/spi.c
D src/soc/intel/braswell/spi_loading.c
D src/soc/intel/braswell/tsc_freq.c
D src/soc/intel/braswell/xhci.c
M src/soc/intel/common/Kconfig
M src/soc/intel/quark/Kconfig
M src/soc/intel/quark/Makefile.inc
D src/soc/intel/quark/fsp1_1.c
M src/soc/intel/quark/include/soc/pm.h
M src/soc/intel/quark/include/soc/ramstage.h
M src/soc/intel/quark/include/soc/romstage.h
M src/soc/intel/quark/romstage/Makefile.inc
M src/soc/intel/quark/romstage/car_stage_entry.S
D src/soc/intel/quark/romstage/fsp1_1.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/Makefile.inc
M src/soc/intel/skylake/bootblock/bootblock.c
D src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/include/soc/bootblock.h
M src/soc/intel/skylake/include/soc/vr_config.h
D src/soc/intel/skylake/opregion.c
M src/soc/intel/skylake/romstage/Makefile.inc
D src/soc/intel/skylake/romstage/car_stage.S
D src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/vr_config.c
M src/southbridge/intel/common/firmware/Kconfig
D src/vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspApi.h
D src/vendorcode/intel/fsp/fsp1_1/IntelFspPkg/Include/FspInfoHeader.h
D src/vendorcode/intel/fsp/fsp1_1/braswell/FspUpdVpd.h
D src/vendorcode/intel/fsp/fsp1_1/checklist/bootblock_complete.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/bootblock_optional.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_complete.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_optional.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat
D src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat
D src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h
D src/vendorcode/intel/fsp/fsp1_1/skylake/FspUpdVpd.h
351 files changed, 7 insertions(+), 32,909 deletions(-)

  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/18930/3
-- 
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I55a4127ccff3fcc8e211437d5db767d94a6cf864
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Adurb Akhbar
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Andrey Petrov <andrey.petrov at intel.com>
Gerrit-Reviewer: Huang Jin <huang.jin at intel.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki at gmail.com>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: York Yang <york.yang at intel.com>
Gerrit-Reviewer: build bot (Jenkins)