[coreboot-gerrit] Change in coreboot[master]: google/pyro: Update DPTF settings

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/18920 )

Change subject: google/pyro: Update DPTF settings
......................................................................


google/pyro: Update DPTF settings

1. correct DPTF TCHG target device to TSR2

2. Refers Change-Id I267b6e07fa9def2c91ff9f6035f2d9437faf1965
   (mb/google/reef: Remove CPU throttling effect of the charger sensor)
   to remove CPU throttling effect of the charger sensor
   since it's not relevant to throttle CPU based on the charger sensor.

BUG=b:35586881
BRANCH=reef
TEST=emerge-pyro coreboot
Change-Id: I4801e0e612e0ddf90764ffe080c679818d33212a
Signed-off-by: Kevin Chiu <Kevin.Chiu at quantatw.com>
Reviewed-on: https://review.coreboot.org/18920
Tested-by: build bot (Jenkins)
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
1 file changed, 2 insertions(+), 5 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  Sumeet R Pawnikar: Looks good to me, but someone else must approve
  build bot (Jenkins): Verified



diff --git a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
index cba6775..8803551 100644
--- a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
@@ -56,15 +56,12 @@
 	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 500, 0, 0, 0, 0 },
 
 #ifdef DPTF_ENABLE_CHARGER
-	/* Charger Effect on Temp Sensor 1 */
-	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
+	/* Charger Effect on Temp Sensor 2 */
+	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 600, 0, 0, 0, 0 },
 #endif
 
 	/* CPU Effect on Temp Sensor 1 */
 	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 80, 0, 0, 0, 0 },
-
-	/* CPU Effect on Temp Sensor 2 */
-	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 1200, 0, 0, 0, 0 },
 })
 
 Name (MPPC, Package ()

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Gerrit-MessageType: merged
Gerrit-Change-Id: I4801e0e612e0ddf90764ffe080c679818d33212a
Gerrit-PatchSet: 6
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Kevin Chiu <Kevin.Chiu at quantatw.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Keith Tzeng <keith.tzeng at quantatw.com>
Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu at quantatw.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
Gerrit-Reviewer: build bot (Jenkins)