[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Enable XHCI clock gate control in ACPI

Furquan Shaikh (Code Review) gerrit at coreboot.org
Tue Mar 21 16:42:22 CET 2017


Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/18879 )

Change subject: soc/intel/skylake: Enable XHCI clock gate control in ACPI
......................................................................


Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/18879/2//COMMIT_MSG
Commit Message:

PS2, Line 14: Check working for XHCI wake when DUT
            : is in S3.
> Checked that. Wake didn't work.
Both with and without this patch? Last I had verified this on chell and it had worked fine.


-- 
To view, visit https://review.coreboot.org/18879
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: comment
Gerrit-Change-Id: Ida2afa2e5f9404c0c15d7027480a28a003ad9a40
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-HasComments: Yes



More information about the coreboot-gerrit mailing list